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author | Ryan <[email protected]> | 2024-03-30 03:57:21 +1100 |
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committer | GitHub <[email protected]> | 2024-03-29 16:57:21 +0000 |
commit | d0cf7b85192ce4431bb4c8c57e2d7501df83ac43 (patch) | |
tree | e182500e7df7bf2886300e53e5c7d7c03b01bb40 /keyboards/xiudi | |
parent | e891109c4e115a303e109b179bf9d24edbdd7ad7 (diff) | |
download | qmk_firmware-d0cf7b85192ce4431bb4c8c57e2d7501df83ac43.tar.gz qmk_firmware-d0cf7b85192ce4431bb4c8c57e2d7501df83ac43.zip |
Update GPIO expander API naming (#23375)
Diffstat (limited to 'keyboards/xiudi')
-rw-r--r-- | keyboards/xiudi/xd84/matrix.c | 6 | ||||
-rw-r--r-- | keyboards/xiudi/xd96/matrix.c | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/keyboards/xiudi/xd84/matrix.c b/keyboards/xiudi/xd84/matrix.c index 04128561ee..d92ac83b4a 100644 --- a/keyboards/xiudi/xd84/matrix.c +++ b/keyboards/xiudi/xd84/matrix.c @@ -51,10 +51,10 @@ static void select_row(uint8_t row) { } static uint16_t read_cols(void) { - // uint16_t state_1 = pca9555_readPins(IC2, PCA9555_PORT0); - // uint16_t state_2 = pca9555_readPins(IC2, PCA9555_PORT1); + // uint16_t state_1 = pca9555_read_pins(IC2, PCA9555_PORT0); + // uint16_t state_2 = pca9555_read_pins(IC2, PCA9555_PORT1); uint16_t state = 0; - pca9555_readPins_all(IC2, &state); + pca9555_read_pins_all(IC2, &state); // For the XD84 all cols are on the same IC and mapped sequentially // while this technically gives 16 column reads, diff --git a/keyboards/xiudi/xd96/matrix.c b/keyboards/xiudi/xd96/matrix.c index beef7fae12..641202ca2c 100644 --- a/keyboards/xiudi/xd96/matrix.c +++ b/keyboards/xiudi/xd96/matrix.c @@ -53,9 +53,9 @@ static uint32_t read_cols(void) { uint8_t state_1 = 0; uint8_t state_2 = 0; uint8_t state_3 = 0; - pca9555_readPins(IC2, PCA9555_PORT0, &state_1); - pca9555_readPins(IC2, PCA9555_PORT1, &state_2); - pca9555_readPins(IC1, PCA9555_PORT1, &state_3); + pca9555_read_pins(IC2, PCA9555_PORT0, &state_1); + pca9555_read_pins(IC2, PCA9555_PORT1, &state_2); + pca9555_read_pins(IC1, PCA9555_PORT1, &state_3); // For the XD96 the pins are mapped to port expanders as follows: // all 8 pins port 0 IC2, first 6 pins port 1 IC2, first 4 pins port 1 IC1 |