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author | Nick Brassel <[email protected]> | 2021-08-29 08:20:25 +1000 |
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committer | Nick Brassel <[email protected]> | 2021-08-29 08:20:25 +1000 |
commit | f061ca497464fe85284906fb163a33eaee7a91ef (patch) | |
tree | 33ef1bfb529aed382e8526c607c4e18717f92571 /platforms/chibios/drivers/uart.h | |
parent | ff65185dec6f97be1eb49f17cea526a0d0bbf3d6 (diff) | |
parent | 4bad375d7c09d949a9dcdd4feba147c9c7a67ec6 (diff) | |
download | qmk_firmware-f061ca497464fe85284906fb163a33eaee7a91ef.tar.gz qmk_firmware-f061ca497464fe85284906fb163a33eaee7a91ef.zip |
Breaking changes develop merge to master, 2021Q3 edition. (#14196)breakpoint_2021_08_280.14.0
Diffstat (limited to 'platforms/chibios/drivers/uart.h')
-rw-r--r-- | platforms/chibios/drivers/uart.h | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h new file mode 100644 index 0000000000..b4e20e9fd3 --- /dev/null +++ b/platforms/chibios/drivers/uart.h @@ -0,0 +1,77 @@ +/* Copyright 2021 + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <https://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> + +#include <hal.h> + +#ifndef SERIAL_DRIVER +# define SERIAL_DRIVER SD1 +#endif + +#ifndef SD1_TX_PIN +# define SD1_TX_PIN A9 +#endif + +#ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE 7 +#endif + +#ifndef SD1_RX_PIN +# define SD1_RX_PIN A10 +#endif + +#ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE 7 +#endif + +#ifndef SD1_CTS_PIN +# define SD1_CTS_PIN A11 +#endif + +#ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE 7 +#endif + +#ifndef SD1_RTS_PIN +# define SD1_RTS_PIN A12 +#endif + +#ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE 7 +#endif + +#ifndef SD1_CR1 +# define SD1_CR1 0 +#endif + +#ifndef SD1_CR2 +# define SD1_CR2 0 +#endif + +#ifndef SD1_CR3 +# define SD1_CR3 0 +#endif + +void uart_init(uint32_t baud); + +void uart_putchar(uint8_t c); + +uint8_t uart_getchar(void); + +bool uart_available(void); |