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author | Nick Brassel <[email protected]> | 2024-11-27 21:29:12 +1100 |
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committer | Nick Brassel <[email protected]> | 2024-11-27 21:29:12 +1100 |
commit | 9f76541b29056150cf57d69569a14a59e13995c7 (patch) | |
tree | 66c7398d873fcda88aebe3090603aefe045ff52e /platforms/chibios | |
parent | 57be4871616ee9a8fe042f6186010d436ec7d4b1 (diff) | |
parent | eb04b94eecbb9b3e64ca9c74f937b5f762440b17 (diff) | |
download | qmk_firmware-9f76541b29056150cf57d69569a14a59e13995c7.tar.gz qmk_firmware-9f76541b29056150cf57d69569a14a59e13995c7.zip |
Merge branch 'develop'
Diffstat (limited to 'platforms/chibios')
46 files changed, 1536 insertions, 905 deletions
diff --git a/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.c b/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.c new file mode 100644 index 0000000000..28cf7c18e0 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.c @@ -0,0 +1,101 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +#if HAL_USE_PAL || defined(__DOXYGEN__) +const PALConfig pal_default_config = +{ + {VAL_GPIOAODT, VAL_GPIOACFGLR, VAL_GPIOACFGHR}, + {VAL_GPIOBODT, VAL_GPIOBCFGLR, VAL_GPIOBCFGHR}, +#if AT32_HAS_GPIOC + {VAL_GPIOCODT, VAL_GPIOCCFGLR, VAL_GPIOCCFGHR}, +#endif + {VAL_GPIODODT, VAL_GPIODCFGLR, VAL_GPIODCFGHR}, +#if AT32_HAS_GPIOF + {VAL_GPIOFODT, VAL_GPIOFCFGLR, VAL_GPIOFCFGHR}, +#endif +}; +#endif + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Early initialization code. + * @details System clocks are initialized before everything else. + */ +void __early_init(void) { + at32_clock_init(); +} + +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + static bool last_status = false; + + if (blkIsTransferring(sdcp)) + return last_status; + return last_status = (bool)palReadPad(GPIOC, GPIOC_PIN11); +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + return false; +} +#endif /* HAL_USE_SDC */ + +/** + * @brief Board-specific initialization code. + * @note You can add your board-specific code here. + */ +void boardInit(void) { + IOMUX->REMAP |= IOMUX_REMAP_SWJTAG_MUX_JTAGDIS; +} diff --git a/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.h b/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.h new file mode 100644 index 0000000000..c3ade198ba --- /dev/null +++ b/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.h @@ -0,0 +1,207 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/* + * Setup for a Generic AT32F415 board. + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC_AT32_F415XX +#define BOARD_NAME "GENERIC AT32F415 board" + +/* + * Board oscillators-related settings. + */ +#if !defined(AT32_LEXTCLK) +#define AT32_LEXTCLK 32768 +#endif + +#if !defined(AT32_HEXTCLK) +#define AT32_HEXTCLK 8000000 +#endif + +/* + * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. + */ +#define AT32F415KB + +/* + * IO pins assignments. + */ +#define GPIOA_PIN0 0U +#define GPIOA_PIN1 1U +#define GPIOA_PIN2 2U +#define GPIOA_PIN3 3U +#define GPIOA_PIN4 4U +#define GPIOA_PIN5 5U +#define GPIOA_PIN6 6U +#define GPIOA_PIN7 7U +#define GPIOA_PIN8 8U +#define GPIOA_PIN9 9U +#define GPIOA_PIN10 10U +#define GPIOA_PIN11 11U +#define GPIOA_PIN12 12U +#define GPIOA_SWDIO 13U +#define GPIOA_SWCLK 14U +#define GPIOA_PIN15 15U + +#define GPIOB_PIN0 0U +#define GPIOB_PIN1 1U +#define GPIOB_PIN2 2U +#define GPIOB_PIN3 3U +#define GPIOB_PIN4 4U +#define GPIOB_PIN5 5U +#define GPIOB_PIN6 6U +#define GPIOB_PIN7 7U +#define GPIOB_PIN8 8U +#define GPIOB_PIN9 9U +#define GPIOB_PIN10 10U +#define GPIOB_PIN11 11U +#define GPIOB_PIN12 12U +#define GPIOB_PIN13 13U +#define GPIOB_PIN14 14U +#define GPIOB_PIN15 15U + +#define GPIOC_PIN0 0U +#define GPIOC_PIN1 1U +#define GPIOC_PIN2 2U +#define GPIOC_PIN3 3U +#define GPIOC_PIN4 4U +#define GPIOC_PIN5 5U +#define GPIOC_PIN6 6U +#define GPIOC_PIN7 7U +#define GPIOC_PIN8 8U +#define GPIOC_PIN9 9U +#define GPIOC_PIN10 10U +#define GPIOC_PIN11 11U +#define GPIOC_PIN12 12U +#define GPIOC_PIN13 13U +#define GPIOC_PIN14 14U +#define GPIOC_PIN15 15U + +#define GPIOD_HEXT_IN 0U +#define GPIOD_HEXT_OUT 1U +#define GPIOD_PIN2 2U + +#define GPIOF_PIN4 4U +#define GPIOF_PIN5 5U +#define GPIOF_PIN6 6U +#define GPIOF_PIN7 7U + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * + * The digits have the following meaning: + * 0 - Analog input. + * 1 - Push Pull output 10MHz. + * 2 - Push Pull output 2MHz. + * 3 - Push Pull output 50MHz. + * 4 - Digital input. + * 5 - Open Drain output 10MHz. + * 6 - Open Drain output 2MHz. + * 7 - Open Drain output 50MHz. + * 8 - Digital input with Pull-Up or Pull-Down resistor depending on ODT. + * 9 - Alternate Push Pull output 10MHz. + * A - Alternate Push Pull output 2MHz. + * B - Alternate Push Pull output 50MHz. + * C - Reserved. + * D - Alternate Open Drain output 10MHz. + * E - Alternate Open Drain output 2MHz. + * F - Alternate Open Drain output 50MHz. + * Please refer to the AT32 Reference Manual for details. + */ + +/* + * Port A setup. + */ +#define VAL_GPIOACFGLR 0x88888B88 /* PA7...PA0 */ +#define VAL_GPIOACFGHR 0x888888B8 /* PA15...PA8 */ +#define VAL_GPIOAODT 0xFFFFFFFF + +/* + * Port B setup. + */ +#define VAL_GPIOBCFGLR 0x88888888 /* PB7...PB0 */ +#define VAL_GPIOBCFGHR 0x88888888 /* PB15...PB8 */ +#define VAL_GPIOBODT 0xFFFFFFFF + +/* + * Port C setup. + */ +#define VAL_GPIOCCFGLR 0x88888888 /* PC7...PC0 */ +#define VAL_GPIOCCFGHR 0x88888888 /* PC15...PC8 */ +#define VAL_GPIOCODT 0xFFFFFFFF + +/* + * Port D setup. + * Everything input with pull-up except: + * PD0 - Normal input (GPIOD_HEXT_IN). + * PD1 - Normal input (GPIOD_HEXT_OUT). + */ +#define VAL_GPIODCFGLR 0x88888844 /* PD7...PD0 */ +#define VAL_GPIODCFGHR 0x88888888 /* PD15...PD8 */ +#define VAL_GPIODODT 0xFFFFFFFF + +/* + * Port F setup. + */ +#define VAL_GPIOFCFGLR 0x88888888 /* PF7...PF0 */ +#define VAL_GPIOFCFGHR 0x88888888 /* PF15...PF8 */ +#define VAL_GPIOFODT 0xFFFFFFFF + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.mk b/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.mk new file mode 100644 index 0000000000..842e335905 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/board/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/boards/GENERIC_AT32_F415XX/configs/config.h b/platforms/chibios/boards/GENERIC_AT32_F415XX/configs/config.h new file mode 100644 index 0000000000..da60447a0a --- /dev/null +++ b/platforms/chibios/boards/GENERIC_AT32_F415XX/configs/config.h @@ -0,0 +1,13 @@ +// Copyright 2023-2024 HorrorTroll <https://github.com/HorrorTroll> +// Copyright 2023-2024 Zhaqian <https://github.com/zhaqian12> +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#define BOARD_OTG_VBUSIG + +#define USB_ENDPOINTS_ARE_REORDERABLE + +#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP +# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE +#endif diff --git a/platforms/chibios/boards/GENERIC_AT32_F415XX/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_AT32_F415XX/configs/mcuconf.h new file mode 100644 index 0000000000..d148379fe1 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_AT32_F415XX/configs/mcuconf.h @@ -0,0 +1,236 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * AT32F415 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define AT32F415_MCUCONF + +/* + * General settings. + */ +#define AT32_NO_INIT FALSE + +/* + * HAL driver system settings. + */ +#define AT32_HICK_ENABLED TRUE +#define AT32_LICK_ENABLED FALSE +#define AT32_HEXT_ENABLED TRUE +#define AT32_LEXT_ENABLED FALSE +#define AT32_SCLKSEL AT32_SCLKSEL_PLL +#define AT32_PLLRCS AT32_PLLRCS_HEXT +#define AT32_PLLHEXTDIV AT32_PLLHEXTDIV_DIV1 +#define AT32_PLLCFGEN AT32_PLLCFGEN_SOLID +#define AT32_PLLMULT_VALUE 18 +#define AT32_PLL_FR_VALUE 4 +#define AT32_PLL_MS_VALUE 1 +#define AT32_PLL_NS_VALUE 72 +#define AT32_AHBDIV AT32_AHBDIV_DIV1 +#define AT32_APB1DIV AT32_APB1DIV_DIV2 +#define AT32_APB2DIV AT32_APB2DIV_DIV2 +#define AT32_ADCDIV AT32_ADCDIV_DIV4 +#define AT32_USB_CLOCK_REQUIRED TRUE +#define AT32_USBDIV AT32_USBDIV_DIV3 +#define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK +#define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 +#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_PVM_ENABLE FALSE +#define AT32_PVMSEL AT32_PVMSEL_LEV1 + +/* + * IRQ system settings. + */ +#define AT32_IRQ_EXINT0_PRIORITY 6 +#define AT32_IRQ_EXINT1_PRIORITY 6 +#define AT32_IRQ_EXINT2_PRIORITY 6 +#define AT32_IRQ_EXINT3_PRIORITY 6 +#define AT32_IRQ_EXINT4_PRIORITY 6 +#define AT32_IRQ_EXINT5_9_PRIORITY 6 +#define AT32_IRQ_EXINT10_15_PRIORITY 6 +#define AT32_IRQ_EXINT16_PRIORITY 6 +#define AT32_IRQ_EXINT17_PRIORITY 15 +#define AT32_IRQ_EXINT18_PRIORITY 6 +#define AT32_IRQ_EXINT19_PRIORITY 6 +#define AT32_IRQ_EXINT20_PRIORITY 6 +#define AT32_IRQ_EXINT21_PRIORITY 15 +#define AT32_IRQ_EXINT22_PRIORITY 15 + +#define AT32_IRQ_TMR1_BRK_TMR9_PRIORITY 7 +#define AT32_IRQ_TMR1_OVF_TMR10_PRIORITY 7 +#define AT32_IRQ_TMR1_HALL_TMR11_PRIORITY 7 +#define AT32_IRQ_TMR1_CH_PRIORITY 7 +#define AT32_IRQ_TMR2_PRIORITY 7 +#define AT32_IRQ_TMR3_PRIORITY 7 +#define AT32_IRQ_TMR4_PRIORITY 7 +#define AT32_IRQ_TMR5_PRIORITY 7 + +#define AT32_IRQ_USART1_PRIORITY 12 +#define AT32_IRQ_USART2_PRIORITY 12 +#define AT32_IRQ_USART3_PRIORITY 12 +#define AT32_IRQ_UART4_PRIORITY 12 +#define AT32_IRQ_UART5_PRIORITY 12 + +/* + * ADC driver system settings. + */ +#define AT32_ADC_USE_ADC1 FALSE +#define AT32_ADC_ADC1_DMA_PRIORITY 2 +#define AT32_ADC_ADC1_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define AT32_CAN_USE_CAN1 FALSE +#define AT32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DMA driver system settings. + */ +#define AT32_DMA_USE_DMAMUX TRUE + +/* + * GPT driver system settings. + */ +#define AT32_GPT_USE_TMR1 FALSE +#define AT32_GPT_USE_TMR2 FALSE +#define AT32_GPT_USE_TMR3 FALSE +#define AT32_GPT_USE_TMR4 FALSE +#define AT32_GPT_USE_TMR5 FALSE +#define AT32_GPT_USE_TMR9 FALSE +#define AT32_GPT_USE_TMR10 FALSE +#define AT32_GPT_USE_TMR11 FALSE + +/* + * I2C driver system settings. + */ +#define AT32_I2C_USE_I2C1 FALSE +#define AT32_I2C_USE_I2C2 FALSE +#define AT32_I2C_BUSY_TIMEOUT 50 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 +#define AT32_I2C_I2C1_DMA_PRIORITY 3 +#define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define AT32_ICU_USE_TMR1 FALSE +#define AT32_ICU_USE_TMR2 FALSE +#define AT32_ICU_USE_TMR3 FALSE +#define AT32_ICU_USE_TMR4 FALSE +#define AT32_ICU_USE_TMR5 FALSE +#define AT32_ICU_USE_TMR9 FALSE +#define AT32_ICU_USE_TMR10 FALSE +#define AT32_ICU_USE_TMR11 FALSE + +/* + * PWM driver system settings. + */ +#define AT32_PWM_USE_TMR1 FALSE +#define AT32_PWM_USE_TMR2 FALSE +#define AT32_PWM_USE_TMR3 FALSE +#define AT32_PWM_USE_TMR4 FALSE +#define AT32_PWM_USE_TMR5 FALSE +#define AT32_PWM_USE_TMR9 FALSE +#define AT32_PWM_USE_TMR10 FALSE +#define AT32_PWM_USE_TMR11 FALSE + +/* + * RTC driver system settings. + */ +#define AT32_ERTC_DIVA_VALUE 32 +#define AT32_ERTC_DIVB_VALUE 1024 +#define AT32_ERTC_CTRL_INIT 0 +#define AT32_ERTC_TAMP_INIT 0 + +/* + * SDC driver system settings. + */ +#define AT32_SDC_SDIO_DMA_PRIORITY 3 +#define AT32_SDC_SDIO_IRQ_PRIORITY 9 +#define AT32_SDC_WRITE_TIMEOUT_MS 1000 +#define AT32_SDC_READ_TIMEOUT_MS 1000 +#define AT32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define AT32_SDC_SDIO_UNALIGNED_SUPPORT TRUE + +/* + * SERIAL driver system settings. + */ +#define AT32_SERIAL_USE_USART1 FALSE +#define AT32_SERIAL_USE_USART2 FALSE +#define AT32_SERIAL_USE_USART3 FALSE +#define AT32_SERIAL_USE_UART4 FALSE +#define AT32_SERIAL_USE_UART5 FALSE + +/* + * SPI driver system settings. + */ +#define AT32_SPI_USE_SPI1 FALSE +#define AT32_SPI_USE_SPI2 FALSE +#define AT32_SPI_SPI1_DMA_PRIORITY 1 +#define AT32_SPI_SPI2_DMA_PRIORITY 1 +#define AT32_SPI_SPI1_IRQ_PRIORITY 10 +#define AT32_SPI_SPI2_IRQ_PRIORITY 10 +#define AT32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define AT32_ST_IRQ_PRIORITY 8 +#define AT32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define AT32_UART_USE_USART1 FALSE +#define AT32_UART_USE_USART2 FALSE +#define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USART1_DMA_PRIORITY 0 +#define AT32_UART_USART2_DMA_PRIORITY 0 +#define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define AT32_USB_USE_OTG1 TRUE +#define AT32_USB_OTG1_IRQ_PRIORITY 14 +#define AT32_USB_OTG1_RX_FIFO_SIZE 512 + +/* + * WDG driver system settings. + */ +#define AT32_WDG_USE_WDT FALSE + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h index 90a41326a1..5333a919a0 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h @@ -21,3 +21,13 @@ #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif + +#ifdef WEAR_LEVELING_EMBEDDED_FLASH +# ifndef WEAR_LEVELING_EFL_FIRST_SECTOR +# ifdef BOOTLOADER_TINYUF2 +# define WEAR_LEVELING_EFL_FIRST_SECTOR 3 +# else +# define WEAR_LEVELING_EFL_FIRST_SECTOR 1 +# endif +# endif +#endif diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/config.h index 90a41326a1..5333a919a0 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/config.h @@ -21,3 +21,13 @@ #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif + +#ifdef WEAR_LEVELING_EMBEDDED_FLASH +# ifndef WEAR_LEVELING_EFL_FIRST_SECTOR +# ifdef BOOTLOADER_TINYUF2 +# define WEAR_LEVELING_EFL_FIRST_SECTOR 3 +# else +# define WEAR_LEVELING_EFL_FIRST_SECTOR 1 +# endif +# endif +#endif diff --git a/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/config.h index cbb98f9098..362327efde 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/config.h @@ -17,3 +17,13 @@ #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif + +#ifdef WEAR_LEVELING_EMBEDDED_FLASH +# ifndef WEAR_LEVELING_EFL_FIRST_SECTOR +# ifdef BOOTLOADER_TINYUF2 +# define WEAR_LEVELING_EFL_FIRST_SECTOR 3 +# else +# define WEAR_LEVELING_EFL_FIRST_SECTOR 1 +# endif +# endif +#endif diff --git a/platforms/chibios/boards/common/ld/STM32F401xC.ld b/platforms/chibios/boards/common/ld/STM32F401xC.ld index 8fae66cec9..64f019706f 100644 --- a/platforms/chibios/boards/common/ld/STM32F401xC.ld +++ b/platforms/chibios/boards/common/ld/STM32F401xC.ld @@ -1,85 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F401xC memory setup. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */ - flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */ - flash2 (rx) : org = 0x08008000, len = 256k - 32k /* Sector 2..6 - Rest of firmware */ - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 64k - ram1 (wx) : org = 0x00000000, len = 0 - ram2 (wx) : org = 0x00000000, len = 0 - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x00000000, len = 0 - ram5 (wx) : org = 0x00000000, len = 0 - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); +f4xx_flash_size = 256k; +f4xx_ram1_size = 64k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; -/* Generic rules inclusion.*/ -INCLUDE rules.ld +INCLUDE stm32f4xx_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F401xC_tinyuf2.ld b/platforms/chibios/boards/common/ld/STM32F401xC_tinyuf2.ld index f4e487dc8f..05aa51917f 100644 --- a/platforms/chibios/boards/common/ld/STM32F401xC_tinyuf2.ld +++ b/platforms/chibios/boards/common/ld/STM32F401xC_tinyuf2.ld @@ -1,88 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F401xC memory setup. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000 + 64k, len = 256k - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */ - flash1 (rx) : org = 0x00000000, len = 0 - flash2 (rx) : org = 0x00000000, len = 0 - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 64k - ram1 (wx) : org = 0x00000000, len = 0 - ram2 (wx) : org = 0x00000000, len = 0 - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x00000000, len = 0 - ram5 (wx) : org = 0x00000000, len = 0 - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); -/* Generic rules inclusion.*/ -INCLUDE rules.ld +f4xx_flash_size = 256k; +f4xx_ram1_size = 64k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; -/* TinyUF2 bootloader reset support */ -_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */ +INCLUDE stm32f4xx_tinyuf2_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F401xE.ld b/platforms/chibios/boards/common/ld/STM32F401xE.ld index 69af7ed71e..6c72c8f127 100644 --- a/platforms/chibios/boards/common/ld/STM32F401xE.ld +++ b/platforms/chibios/boards/common/ld/STM32F401xE.ld @@ -1,85 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F401xE memory setup. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */ - flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */ - flash2 (rx) : org = 0x08008000, len = 512k - 32k /* Sector 2..7 - Rest of firmware */ - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 96k - ram1 (wx) : org = 0x00000000, len = 0 - ram2 (wx) : org = 0x00000000, len = 0 - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x00000000, len = 0 - ram5 (wx) : org = 0x00000000, len = 0 - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); +f4xx_flash_size = 512k; +f4xx_ram1_size = 96k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; -/* Generic rules inclusion.*/ -INCLUDE rules.ld +INCLUDE stm32f4xx_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F401xE_tinyuf2.ld b/platforms/chibios/boards/common/ld/STM32F401xE_tinyuf2.ld index 895d13fa32..65272ec015 100644 --- a/platforms/chibios/boards/common/ld/STM32F401xE_tinyuf2.ld +++ b/platforms/chibios/boards/common/ld/STM32F401xE_tinyuf2.ld @@ -1,88 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F401xE memory setup. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000 + 64k, len = 512k - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */ - flash1 (rx) : org = 0x00000000, len = 0 - flash2 (rx) : org = 0x00000000, len = 0 - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 96k - ram1 (wx) : org = 0x00000000, len = 0 - ram2 (wx) : org = 0x00000000, len = 0 - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x00000000, len = 0 - ram5 (wx) : org = 0x00000000, len = 0 - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); -/* Generic rules inclusion.*/ -INCLUDE rules.ld +f4xx_flash_size = 512k; +f4xx_ram1_size = 96k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; -/* TinyUF2 bootloader reset support */ -_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */ +INCLUDE stm32f4xx_tinyuf2_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F405xG.ld b/platforms/chibios/boards/common/ld/STM32F405xG.ld index b7d0baa210..d9468e18c5 100644 --- a/platforms/chibios/boards/common/ld/STM32F405xG.ld +++ b/platforms/chibios/boards/common/ld/STM32F405xG.ld @@ -1,86 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F405xG memory setup. - * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */ - flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */ - flash2 (rx) : org = 0x08008000, len = 1M - 32k /* Sector 2..6 - Rest of firmware */ - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ - ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ - ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */ - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ - ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); +f4xx_flash_size = 1M; +f4xx_ram1_size = 112k; +f4xx_ram2_size = 16k; +f4xx_ram4_size = 64k; +f4xx_ram5_size = 4k; -/* Generic rules inclusion.*/ -INCLUDE rules.ld +INCLUDE stm32f4xx_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F405xG_tinyuf2.ld b/platforms/chibios/boards/common/ld/STM32F405xG_tinyuf2.ld index 1ee4aa1a06..51c4b625ac 100644 --- a/platforms/chibios/boards/common/ld/STM32F405xG_tinyuf2.ld +++ b/platforms/chibios/boards/common/ld/STM32F405xG_tinyuf2.ld @@ -1,89 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F405xG memory setup. - * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000 + 64k, len = 1M - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */ - flash1 (rx) : org = 0x00000000, len = 0 - flash2 (rx) : org = 0x00000000, len = 0 - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ - ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ - ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */ - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ - ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); -/* Generic rules inclusion.*/ -INCLUDE rules.ld +f4xx_flash_size = 1M; +f4xx_ram1_size = 112k; +f4xx_ram2_size = 16k; +f4xx_ram4_size = 64k; +f4xx_ram5_size = 4k; -/* TinyUF2 bootloader reset support */ -_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */ +INCLUDE stm32f4xx_tinyuf2_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F407xE.ld b/platforms/chibios/boards/common/ld/STM32F407xE.ld new file mode 100644 index 0000000000..66dd991163 --- /dev/null +++ b/platforms/chibios/boards/common/ld/STM32F407xE.ld @@ -0,0 +1,13 @@ +/* + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +f4xx_flash_size = 512k; +f4xx_ram1_size = 112k; +f4xx_ram2_size = 16k; +f4xx_ram4_size = 64k; +f4xx_ram5_size = 4k; + +INCLUDE stm32f4xx_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F407xE_tinyuf2.ld b/platforms/chibios/boards/common/ld/STM32F407xE_tinyuf2.ld new file mode 100644 index 0000000000..0cb7b89636 --- /dev/null +++ b/platforms/chibios/boards/common/ld/STM32F407xE_tinyuf2.ld @@ -0,0 +1,13 @@ +/* + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +f4xx_flash_size = 512k; +f4xx_ram1_size = 112k; +f4xx_ram2_size = 16k; +f4xx_ram4_size = 64k; +f4xx_ram5_size = 4k; + +INCLUDE stm32f4xx_tinyuf2_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F411xC.ld b/platforms/chibios/boards/common/ld/STM32F411xC.ld new file mode 100644 index 0000000000..5e3f7e034b --- /dev/null +++ b/platforms/chibios/boards/common/ld/STM32F411xC.ld @@ -0,0 +1,13 @@ +/* + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +f4xx_flash_size = 256k; +f4xx_ram1_size = 128k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; + +INCLUDE stm32f4xx_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F411xC_tinyuf2.ld b/platforms/chibios/boards/common/ld/STM32F411xC_tinyuf2.ld index 82253d3de5..63a33309fd 100644 --- a/platforms/chibios/boards/common/ld/STM32F411xC_tinyuf2.ld +++ b/platforms/chibios/boards/common/ld/STM32F411xC_tinyuf2.ld @@ -1,89 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F411xC memory setup. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000 + 64k, len = 256k - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */ - flash1 (rx) : org = 0x00000000, len = 0 - flash2 (rx) : org = 0x00000000, len = 0 - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 128k - ram1 (wx) : org = 0x00000000, len = 0 - ram2 (wx) : org = 0x00000000, len = 0 - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x00000000, len = 0 - ram5 (wx) : org = 0x00000000, len = 0 - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld -/* TinyUF2 bootloader reset support */ -_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */ +f4xx_flash_size = 256k; +f4xx_ram1_size = 128k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; +INCLUDE stm32f4xx_tinyuf2_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F411xE.ld b/platforms/chibios/boards/common/ld/STM32F411xE.ld index aea8084b51..c798a775e9 100644 --- a/platforms/chibios/boards/common/ld/STM32F411xE.ld +++ b/platforms/chibios/boards/common/ld/STM32F411xE.ld @@ -1,85 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F411xE memory setup. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */ - flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */ - flash2 (rx) : org = 0x08008000, len = 512k - 32k /* Sector 2..7 - Rest of firmware */ - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 128k - ram1 (wx) : org = 0x00000000, len = 0 - ram2 (wx) : org = 0x00000000, len = 0 - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x00000000, len = 0 - ram5 (wx) : org = 0x00000000, len = 0 - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); +f4xx_flash_size = 512k; +f4xx_ram1_size = 128k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; -/* Generic rules inclusion.*/ -INCLUDE rules.ld +INCLUDE stm32f4xx_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F411xE_tinyuf2.ld b/platforms/chibios/boards/common/ld/STM32F411xE_tinyuf2.ld index 1656c67bf7..25253f5590 100644 --- a/platforms/chibios/boards/common/ld/STM32F411xE_tinyuf2.ld +++ b/platforms/chibios/boards/common/ld/STM32F411xE_tinyuf2.ld @@ -1,89 +1,13 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32F411xE memory setup. + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later */ -MEMORY -{ - flash0 (rx) : org = 0x08000000 + 64k, len = 512k - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */ - flash1 (rx) : org = 0x00000000, len = 0 - flash2 (rx) : org = 0x00000000, len = 0 - flash3 (rx) : org = 0x00000000, len = 0 - flash4 (rx) : org = 0x00000000, len = 0 - flash5 (rx) : org = 0x00000000, len = 0 - flash6 (rx) : org = 0x00000000, len = 0 - flash7 (rx) : org = 0x00000000, len = 0 - ram0 (wx) : org = 0x20000000, len = 128k - ram1 (wx) : org = 0x00000000, len = 0 - ram2 (wx) : org = 0x00000000, len = 0 - ram3 (wx) : org = 0x00000000, len = 0 - ram4 (wx) : org = 0x00000000, len = 0 - ram5 (wx) : org = 0x00000000, len = 0 - ram6 (wx) : org = 0x00000000, len = 0 - ram7 (wx) : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld -/* TinyUF2 bootloader reset support */ -_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */ +f4xx_flash_size = 512k; +f4xx_ram1_size = 128k; +f4xx_ram2_size = 0; +f4xx_ram4_size = 0; +f4xx_ram5_size = 0; +INCLUDE stm32f4xx_tinyuf2_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F446xE.ld b/platforms/chibios/boards/common/ld/STM32F446xE.ld new file mode 100644 index 0000000000..6e6c5dd3a4 --- /dev/null +++ b/platforms/chibios/boards/common/ld/STM32F446xE.ld @@ -0,0 +1,13 @@ +/* + * Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +f4xx_flash_size = 512k; +f4xx_ram1_size = 112k; +f4xx_ram2_size = 16k; +f4xx_ram4_size = 0; +f4xx_ram5_size = 4k; + +INCLUDE stm32f4xx_common.ld diff --git a/platforms/chibios/boards/common/ld/STM32F446xE_tinyuf2.ld b/platforms/chibios/boards/common/ld/STM32F446xE_tinyuf2.ld new file mode 100644 index 0000000000..676ffbdf0c --- /dev/null +++ b/platforms/chibios/boards/common/ld/STM32F446xE_tinyuf2.ld @@ -0,0 +1,13 @@ +/* +* Copyright 2006..2018 Giovanni Di Sirio + * Copyright 2022 QMK contributors + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +f4xx_flash_size = 512k; +f4xx_ram1_size = 112k; +f4xx_ram2_size = 16k; +f4xx_ram4_size = 0; +f4xx_ram5_size = 4k; + +INCLUDE stm32f4xx_tinyuf2_common.ld diff --git a/platforms/chibios/boards/common/ld/stm32f4xx_common.ld b/platforms/chibios/boards/common/ld/stm32f4xx_common.ld new file mode 100644 index 0000000000..d5c7c73626 --- /dev/null +++ b/platforms/chibios/boards/common/ld/stm32f4xx_common.ld @@ -0,0 +1,82 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */ + flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */ + flash2 (rx) : org = 0x08008000, len = f4xx_flash_size - 32k /* Sector 2..6 - Rest of firmware */ + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = f4xx_ram1_size + f4xx_ram2_size /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = f4xx_ram1_size /* SRAM1 */ + ram2 (wx) : org = 0x20000000 + f4xx_ram1_size, len = f4xx_ram2_size /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = f4xx_ram4_size /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = f4xx_ram5_size /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash2); +REGION_ALIAS("XTORS_FLASH_LMA", flash2); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash2); +REGION_ALIAS("TEXT_FLASH_LMA", flash2); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash2); +REGION_ALIAS("RODATA_FLASH_LMA", flash2); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash2); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash2); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/platforms/chibios/boards/common/ld/stm32f4xx_tinyuf2_common.ld b/platforms/chibios/boards/common/ld/stm32f4xx_tinyuf2_common.ld new file mode 100644 index 0000000000..d995bd014a --- /dev/null +++ b/platforms/chibios/boards/common/ld/stm32f4xx_tinyuf2_common.ld @@ -0,0 +1,88 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F411xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000 + 64k, len = f4xx_flash_size - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */ + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = f4xx_ram1_size + f4xx_ram2_size /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = f4xx_ram1_size /* SRAM1 */ + ram2 (wx) : org = 0x20000000 + f4xx_ram1_size, len = f4xx_ram2_size /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = f4xx_ram4_size /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = f4xx_ram5_size /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld + +/* TinyUF2 bootloader reset support */ +_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */ diff --git a/platforms/chibios/bootloader.mk b/platforms/chibios/bootloader.mk index 5b6edd73ad..e292e1e0b0 100644 --- a/platforms/chibios/bootloader.mk +++ b/platforms/chibios/bootloader.mk @@ -26,6 +26,7 @@ # stm32-dfu STM32 USB DFU in ROM # apm32-dfu APM32 USB DFU in ROM # wb32-dfu WB32 USB DFU in ROM +# at32-dfu AT32 USB DFU in ROM # tinyuf2 TinyUF2 # rp2040 Raspberry Pi RP2040 # Current options for RISC-V: @@ -119,6 +120,14 @@ ifeq ($(strip $(BOOTLOADER)), wb32-dfu) OPT_DEFS += -DBOOTLOADER_WB32_DFU BOOTLOADER_TYPE = wb32_dfu endif +ifeq ($(strip $(BOOTLOADER)), at32-dfu) + OPT_DEFS += -DBOOTLOADER_AT32_DFU + BOOTLOADER_TYPE = at32_dfu + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 2E3C:DF11 -a 0 -s 0x08000000:leave + DFU_SUFFIX_ARGS ?= -v 2E3C -p DF11 +endif ifeq ($(strip $(BOOTLOADER_TYPE)),) ifneq ($(strip $(BOOTLOADER)),) diff --git a/platforms/chibios/bootloaders/at32_dfu.c b/platforms/chibios/bootloaders/at32_dfu.c new file mode 100644 index 0000000000..f3a453d0fc --- /dev/null +++ b/platforms/chibios/bootloaders/at32_dfu.c @@ -0,0 +1,83 @@ +// Copyright 2021-2023 QMK +// Copyright 2023-2024 HorrorTroll <https://github.com/HorrorTroll> +// Copyright 2023-2024 Zhaqian <https://github.com/zhaqian12> +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "bootloader.h" +#include "util.h" + +#include <ch.h> +#include <hal.h> +#include "wait.h" + +#ifndef AT32_BOOTLOADER_RAM_SYMBOL +# define AT32_BOOTLOADER_RAM_SYMBOL __ram0_end__ +#endif + +extern uint32_t AT32_BOOTLOADER_RAM_SYMBOL; + +/* This code should be checked whether it runs correctly on platforms */ +#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) +#define BOOTLOADER_MAGIC 0xDEADBEEF +#define MAGIC_ADDR (unsigned long *)(SYMVAL(AT32_BOOTLOADER_RAM_SYMBOL) - 4) + +__attribute__((weak)) void bootloader_marker_enable(void) { + uint32_t *marker = (uint32_t *)MAGIC_ADDR; + *marker = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader +} + +__attribute__((weak)) bool bootloader_marker_active(void) { + const uint32_t *marker = (const uint32_t *)MAGIC_ADDR; + return (*marker == BOOTLOADER_MAGIC) ? true : false; +} + +__attribute__((weak)) void bootloader_marker_disable(void) { + uint32_t *marker = (uint32_t *)MAGIC_ADDR; + *marker = 0; +} + +__attribute__((weak)) void bootloader_jump(void) { + bootloader_marker_enable(); + NVIC_SystemReset(); +} + +__attribute__((weak)) void mcu_reset(void) { + NVIC_SystemReset(); +} + +void enter_bootloader_mode_if_requested(void) { + if (bootloader_marker_active()) { + bootloader_marker_disable(); + + struct system_memory_vector_t { + uint32_t stack_top; + void (*entrypoint)(void); + }; + const struct system_memory_vector_t *bootloader = (const struct system_memory_vector_t *)(AT32_BOOTLOADER_ADDRESS); + + __disable_irq(); + +#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U) + ARM_MPU_Disable(); +#endif + + SysTick->CTRL = 0; + SysTick->VAL = 0; + SysTick->LOAD = 0; + + // Clear interrupt enable and interrupt pending registers + for (int i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) { + NVIC->ICER[i] = 0xFFFFFFFF; + NVIC->ICPR[i] = 0xFFFFFFFF; + } + + __set_CONTROL(0); + __set_MSP(bootloader->stack_top); + __enable_irq(); + + // Jump to bootloader + bootloader->entrypoint(); + while (true) { + } + } +} diff --git a/platforms/chibios/chibios_config.h b/platforms/chibios/chibios_config.h index 8f46fe0736..95136baf30 100644 --- a/platforms/chibios/chibios_config.h +++ b/platforms/chibios/chibios_config.h @@ -142,6 +142,19 @@ # endif #endif +// AT32 compatibility +#if defined(MCU_AT32) +# define CPU_CLOCK AT32_SYSCLK + +# if defined(AT32F415) +# define USE_GPIOV1 +# define USE_I2CV1 +# define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_AT32_ALTERNATE_OPENDRAIN +# define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_AT32_ALTERNATE_PUSHPULL +# define AUDIO_PWM_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL +# endif +#endif + #if defined(GD32VF103) /* This chip has the same API as STM32F103, but uses different names for literally the same thing. * As of 4.7.2021 QMK is tailored to use STM32 defines/names, for compatibility sake diff --git a/platforms/chibios/config.h b/platforms/chibios/config.h index 006415a5dc..a58479bb97 100644 --- a/platforms/chibios/config.h +++ b/platforms/chibios/config.h @@ -5,3 +5,7 @@ #ifndef CORTEX_ENABLE_WFI_IDLE # define CORTEX_ENABLE_WFI_IDLE TRUE #endif // CORTEX_ENABLE_WFI_IDLE + +#ifndef SERIAL_NUMBER_USE_HARDWARE_ID +# define SERIAL_NUMBER_USE_HARDWARE_ID TRUE +#endif // SERIAL_NUMBER_USE_HARDWARE_ID diff --git a/platforms/chibios/converters/promicro_to_svlinky/_pin_defs.h b/platforms/chibios/converters/promicro_to_svlinky/_pin_defs.h new file mode 100644 index 0000000000..b90e5f4020 --- /dev/null +++ b/platforms/chibios/converters/promicro_to_svlinky/_pin_defs.h @@ -0,0 +1,36 @@ +// Copyright 2023 QMK +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +// Left side (front) +#define D3 0U +#define D2 1U +// GND +// GND +#define D1 2U +#define D0 3U +#define D4 4U +#define C6 5U +#define D7 6U +#define E6 7U +#define B4 8U +#define B5 9U + +// Right side (front) +// RAW +// GND +// RESET +// VCC +#define F4 29U +#define F5 28U +#define F6 18U +#define F7 24U +#define B1 22U +#define B3 20U +#define B2 23U +#define B6 21U + +// LEDs +#define D5 17U +#define B0 25U diff --git a/platforms/chibios/converters/promicro_to_svlinky/converter.mk b/platforms/chibios/converters/promicro_to_svlinky/converter.mk new file mode 100644 index 0000000000..bfca20cd99 --- /dev/null +++ b/platforms/chibios/converters/promicro_to_svlinky/converter.mk @@ -0,0 +1,10 @@ +# rp2040_ce MCU settings for converting AVR projects +MCU := RP2040 +BOARD := QMK_PM2040 +BOOTLOADER := rp2040 + +# These are defaults based on what has been implemented for RP2040 boards +SERIAL_DRIVER ?= vendor +WS2812_DRIVER ?= vendor +BACKLIGHT_DRIVER ?= software +OPT_DEFS += -DUSB_VBUS_PIN=19U diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c index fb146df936..7e1f87e6c9 100644 --- a/platforms/chibios/drivers/analog.c +++ b/platforms/chibios/drivers/analog.c @@ -22,7 +22,7 @@ # error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC." #endif -#if !RP_ADC_USE_ADC1 && !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1 +#if !RP_ADC_USE_ADC1 && !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1 && !AT32_ADC_USE_ADC1 # error "You need to set one of the 'xxx_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC." #endif @@ -45,7 +45,7 @@ // Otherwise assume V3 #if defined(STM32F0XX) || defined(STM32L0XX) # define USE_ADCV1 -#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) +#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) || defined(AT32F415) # define USE_ADCV2 #endif @@ -82,7 +82,7 @@ /* User configurable ADC options */ #ifndef ADC_COUNT -# if defined(RP2040) || defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) +# if defined(RP2040) || defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) || defined(AT32F415) # define ADC_COUNT 1 # elif defined(STM32F3XX) || defined(STM32G4XX) # define ADC_COUNT 4 @@ -142,11 +142,16 @@ static ADCConversionGroup adcConversionGroup = { .cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION, .smpr = ADC_SAMPLING_RATE, #elif defined(USE_ADCV2) -# if !defined(STM32F1XX) && !defined(GD32VF103) && !defined(WB32F3G71xx) && !defined(WB32FQ95xx) - .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without... +# if !defined(STM32F1XX) && !defined(GD32VF103) && !defined(WB32F3G71xx) && !defined(WB32FQ95xx) && !defined(AT32F415) + .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without... # endif +# if defined(AT32F415) + .spt2 = ADC_SPT2_CSPT_AN0(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN1(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN2(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN3(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN4(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN5(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN6(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN7(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN8(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN9(ADC_SAMPLING_RATE), + .spt1 = ADC_SPT1_CSPT_AN10(ADC_SAMPLING_RATE) | ADC_SPT1_CSPT_AN11(ADC_SAMPLING_RATE) | ADC_SPT1_CSPT_AN12(ADC_SAMPLING_RATE) | ADC_SPT1_CSPT_AN13(ADC_SAMPLING_RATE) | ADC_SPT1_CSPT_AN14(ADC_SAMPLING_RATE) | ADC_SPT1_CSPT_AN15(ADC_SAMPLING_RATE), +# else .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE), .smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE), +# endif #elif defined(RP2040) // RP2040 does not have any extra config here #else @@ -242,7 +247,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { case F9: return TO_MUX( ADC_CHANNEL_IN7, 2 ); case F10: return TO_MUX( ADC_CHANNEL_IN8, 2 ); # endif -#elif defined(STM32F1XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) +#elif defined(STM32F1XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) || defined(AT32F415) case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 ); case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 ); case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 ); @@ -344,7 +349,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { static inline ADCDriver* intToADCDriver(uint8_t adcInt) { switch (adcInt) { -#if RP_ADC_USE_ADC1 || STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1 +#if RP_ADC_USE_ADC1 || STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1 || AT32_ADC_USE_ADC1 case 0: return &ADCD1; #endif @@ -391,7 +396,11 @@ int16_t adc_read(adc_mux mux) { // TODO: fix previous assumption of only 1 input... adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/ #elif defined(USE_ADCV2) +# if defined(AT32F415) + adcConversionGroup.osq3 = ADC_OSQ3_OSN1_N(mux.input); +# else adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input); +# endif #elif defined(RP2040) adcConversionGroup.channel_mask = 1 << mux.input; #else diff --git a/platforms/chibios/drivers/backlight_pwm.c b/platforms/chibios/drivers/backlight_pwm.c index 01e6f71307..25fe7962b0 100644 --- a/platforms/chibios/drivers/backlight_pwm.c +++ b/platforms/chibios/drivers/backlight_pwm.c @@ -25,7 +25,7 @@ # define BACKLIGHT_PWM_CHANNEL 3 #endif -// Support for pins which are on TIM1_CH1N - requires STM32_PWM_USE_ADVANCED +// Support for pins which are on TIM1_CH1N #ifdef BACKLIGHT_PWM_COMPLEMENTARY_OUTPUT # if BACKLIGHT_ON_STATE == 1 # define PWM_OUTPUT_MODE PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW; diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c index 767ef8726f..becf3afbce 100644 --- a/platforms/chibios/drivers/serial_usart.c +++ b/platforms/chibios/drivers/serial_usart.c @@ -9,6 +9,17 @@ #if defined(SERIAL_USART_CONFIG) static QMKSerialConfig serial_config = SERIAL_USART_CONFIG; +#elif defined(MCU_AT32) /* AT32 MCUs */ +static QMKSerialConfig serial_config = { + .speed = (SERIAL_USART_SPEED), + .ctrl1 = (SERIAL_USART_CTRL1), + .ctrl2 = (SERIAL_USART_CTRL2), +# if !defined(SERIAL_USART_FULL_DUPLEX) + .ctrl3 = ((SERIAL_USART_CTRL3) | USART_CTRL3_SLBEN) /* activate half-duplex mode */ +# else + .ctrl3 = (SERIAL_USART_CTRL3) +# endif +}; #elif defined(MCU_STM32) /* STM32 MCUs */ static QMKSerialConfig serial_config = { # if HAL_USE_SERIAL @@ -160,7 +171,7 @@ inline bool serial_transport_receive_blocking(uint8_t* destination, const size_t * @brief Initiate pins for USART peripheral. Half-duplex configuration. */ __attribute__((weak)) void usart_init(void) { -# if defined(MCU_STM32) /* STM32 MCUs */ +# if defined(MCU_STM32) || defined(MCU_AT32) /* STM32 and AT32 MCUs */ # if defined(USE_GPIOV1) palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE_OPENDRAIN); # else @@ -183,7 +194,7 @@ __attribute__((weak)) void usart_init(void) { * @brief Initiate pins for USART peripheral. Full-duplex configuration. */ __attribute__((weak)) void usart_init(void) { -# if defined(MCU_STM32) /* STM32 MCUs */ +# if defined(MCU_STM32) || defined(MCU_AT32) /* STM32 and AT32 MCUs */ # if defined(USE_GPIOV1) palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE_PUSHPULL); palSetLineMode(SERIAL_USART_RX_PIN, PAL_MODE_INPUT); diff --git a/platforms/chibios/drivers/serial_usart.h b/platforms/chibios/drivers/serial_usart.h index dec8a292e9..dbd7673273 100644 --- a/platforms/chibios/drivers/serial_usart.h +++ b/platforms/chibios/drivers/serial_usart.h @@ -74,40 +74,75 @@ typedef SIOConfig QMKSerialConfig; # endif #endif -#if !defined(USART_CR1_M0) -# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so -#endif +#if defined(MCU_STM32) /* STM32 MCUs */ +# if !defined(USART_CR1_M0) +# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so +# endif -#if !defined(SERIAL_USART_CR1) -# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length -#endif +# if !defined(SERIAL_USART_CR1) +# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length +# endif -#if !defined(SERIAL_USART_CR2) -# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits -#endif +# if !defined(SERIAL_USART_CR2) +# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits +# endif -#if !defined(SERIAL_USART_CR3) -# define SERIAL_USART_CR3 0 -#endif +# if !defined(SERIAL_USART_CR3) +# define SERIAL_USART_CR3 0 +# endif + +# if defined(USART1_REMAP) +# define USART_REMAP \ + do { \ + (AFIO->MAPR |= AFIO_MAPR_USART1_REMAP); \ + } while (0) +# elif defined(USART2_REMAP) +# define USART_REMAP \ + do { \ + (AFIO->MAPR |= AFIO_MAPR_USART2_REMAP); \ + } while (0) +# elif defined(USART3_PARTIALREMAP) +# define USART_REMAP \ + do { \ + (AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_PARTIALREMAP); \ + } while (0) +# elif defined(USART3_FULLREMAP) +# define USART_REMAP \ + do { \ + (AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_FULLREMAP); \ + } while (0) +# endif +#elif defined(MCU_AT32) /* AT32 MCUs */ +# if !defined(USART_CTRL1_DBN0) +# define USART_CTRL1_DBN0 USART_CTRL1_DBN +# endif -#if defined(USART1_REMAP) -# define USART_REMAP \ - do { \ - (AFIO->MAPR |= AFIO_MAPR_USART1_REMAP); \ - } while (0) -#elif defined(USART2_REMAP) -# define USART_REMAP \ - do { \ - (AFIO->MAPR |= AFIO_MAPR_USART2_REMAP); \ - } while (0) -#elif defined(USART3_PARTIALREMAP) -# define USART_REMAP \ - do { \ - (AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_PARTIALREMAP); \ - } while (0) -#elif defined(USART3_FULLREMAP) -# define USART_REMAP \ - do { \ - (AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_FULLREMAP); \ - } while (0) +# if !defined(SERIAL_USART_CTRL1) +# define SERIAL_USART_CTRL1 (USART_CTRL1_PEN | USART_CTRL1_PSEL | USART_CTRL1_DBN0) // parity enable, odd parity, 9 bit length +# endif + +# if !defined(SERIAL_USART_CTRL2) +# define SERIAL_USART_CTRL2 (USART_CTRL2_STOPBN_1) // 2 stop bits +# endif + +# if !defined(SERIAL_USART_CTRL3) +# define SERIAL_USART_CTRL3 0 +# endif + +# if defined(USART1_REMAP) +# define USART_REMAP \ + do { \ + (IOMUX->REMAP |= IOMUX_REMAP_USART1_MUX); \ + } while (0) +# elif defined(USART3_PARTIALREMAP) +# define USART_REMAP \ + do { \ + (IOMUX->REMAP |= IOMUX_REMAP_USART3_MUX_MUX1); \ + } while (0) +# elif defined(USART3_FULLREMAP) +# define USART_REMAP \ + do { \ + (IOMUX->REMAP |= IOMUX_REMAP_USART3_MUX_MUX2); \ + } while (0) +# endif #endif diff --git a/platforms/chibios/drivers/spi_master.c b/platforms/chibios/drivers/spi_master.c index fcdbc9ecf0..6417b7077f 100644 --- a/platforms/chibios/drivers/spi_master.c +++ b/platforms/chibios/drivers/spi_master.c @@ -19,13 +19,33 @@ #include "timer.h" static bool spiStarted = false; - #if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE -static pin_t currentSlavePin; +static pin_t current_slave_pin = NO_PIN; +static bool current_cs_active_low = true; #endif static SPIConfig spiConfig; +static inline void spi_select(void) { + spiSelect(&SPI_DRIVER); + +#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE + if (current_slave_pin != NO_PIN) { + gpio_write_pin(current_slave_pin, current_cs_active_low ? 0 : 1); + } +#endif +} + +static inline void spi_unselect(void) { +#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE + if (current_slave_pin != NO_PIN) { + gpio_write_pin(current_slave_pin, current_cs_active_low ? 1 : 0); + } +#endif + + spiUnselect(&SPI_DRIVER); +} + __attribute__((weak)) void spi_init(void) { static bool is_initialised = false; if (!is_initialised) { @@ -63,7 +83,7 @@ __attribute__((weak)) void spi_init(void) { } } -bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { +bool spi_start_extended(spi_start_config_t *start_config) { #if (SPI_USE_MUTUAL_EXCLUSION == TRUE) spiAcquireBus(&SPI_DRIVER); #endif // (SPI_USE_MUTUAL_EXCLUSION == TRUE) @@ -71,32 +91,37 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { if (spiStarted) { return false; } - #if SPI_SELECT_MODE != SPI_SELECT_MODE_NONE - if (slavePin == NO_PIN) { + if (start_config->slave_pin == NO_PIN) { return false; } #endif #if !(defined(WB32F3G71xx) || defined(WB32FQ95xx)) uint16_t roundedDivisor = 2; - while (roundedDivisor < divisor) { + while (roundedDivisor < start_config->divisor) { roundedDivisor <<= 1; } +# if defined(AT32F415) + if (roundedDivisor < 2 || roundedDivisor > 1024) { + return false; + } +# else if (roundedDivisor < 2 || roundedDivisor > 256) { return false; } +# endif #endif #if defined(K20x) || defined(KL2x) spiConfig.tar0 = SPIx_CTARn_FMSZ(7) | SPIx_CTARn_ASC(1); - if (lsbFirst) { + if (start_config->lsb_first) { spiConfig.tar0 |= SPIx_CTARn_LSBFE; } - switch (mode) { + switch (start_config->mode) { case 0: break; case 1: @@ -141,11 +166,11 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { spiConfig.cr0 = SPI_CR0_SELOEN; spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode - if (lsbFirst) { + if (start_config->lsb_first) { spiConfig.cr1 |= SPI_CR1_FIRSTBIT; } - switch (mode) { + switch (start_config->mode) { case 0: spiConfig.cr1 |= SPI_CR1_FORMAT_MODE0; break; @@ -163,17 +188,17 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { spiConfig.cpr = (roundedDivisor - 1) >> 1; #elif defined(WB32F3G71xx) || defined(WB32FQ95xx) - if (!lsbFirst) { - osalDbgAssert(lsbFirst != FALSE, "unsupported lsbFirst"); + if (!start_config->lsb_first) { + osalDbgAssert(start_config->lsb_first != FALSE, "unsupported lsb_first"); } - if (divisor < 1) { + if (start_config->divisor < 1) { return false; } - spiConfig.SPI_BaudRatePrescaler = (divisor << 2); + spiConfig.SPI_BaudRatePrescaler = (start_config->divisor << 2); - switch (mode) { + switch (start_config->mode) { case 0: spiConfig.SPI_CPHA = SPI_CPHA_1Edge; spiConfig.SPI_CPOL = SPI_CPOL_Low; @@ -192,8 +217,8 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { break; } #elif defined(MCU_RP) - if (lsbFirst) { - osalDbgAssert(lsbFirst == false, "RP2040s PrimeCell SPI implementation does not support sending LSB first."); + if (start_config->lsb_first) { + osalDbgAssert(start_config->lsb_first == false, "RP2040s PrimeCell SPI implementation does not support sending LSB first."); } // Motorola frame format and 8bit transfer data size. @@ -203,7 +228,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { // passed divisor to be the only value to divide the input clock by. spiConfig.SSPCPSR = roundedDivisor; // Even number from 2 to 254 - switch (mode) { + switch (start_config->mode) { case 0: spiConfig.SSPCR0 &= ~SPI_SSPCR0_SPO; // Clock polarity: low spiConfig.SSPCR0 &= ~SPI_SSPCR0_SPH; // Clock phase: sample on first edge @@ -221,14 +246,67 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { spiConfig.SSPCR0 |= SPI_SSPCR0_SPH; // Clock phase: sample on second edge transition break; } +#elif defined(AT32F415) + spiConfig.ctrl1 = 0; + + if (lsbFirst) { + spiConfig.ctrl1 |= SPI_CTRL1_LTF; + } + + switch (mode) { + case 0: + break; + case 1: + spiConfig.ctrl1 |= SPI_CTRL1_CLKPHA; + break; + case 2: + spiConfig.ctrl1 |= SPI_CTRL1_CLKPOL; + break; + case 3: + spiConfig.ctrl1 |= SPI_CTRL1_CLKPHA | SPI_CTRL1_CLKPOL; + break; + } + + switch (roundedDivisor) { + case 2: + break; + case 4: + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_0; + break; + case 8: + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_1; + break; + case 16: + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0; + break; + case 32: + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2; + break; + case 64: + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_0; + break; + case 128: + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1; + break; + case 256: + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0; + break; + case 512: + spiConfig.ctrl2 |= SPI_CTRL1_MDIV_3; + break; + case 1024: + spiConfig.ctrl2 |= SPI_CTRL1_MDIV_3; + spiConfig.ctrl1 |= SPI_CTRL1_MDIV_0; + break; + } #else spiConfig.cr1 = 0; - if (lsbFirst) { + if (start_config->lsb_first) { spiConfig.cr1 |= SPI_CR1_LSBFIRST; } - switch (mode) { + switch (start_config->mode) { case 0: break; case 1: @@ -271,31 +349,37 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { spiStarted = true; #if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE - currentSlavePin = slavePin; + current_slave_pin = start_config->slave_pin; + current_cs_active_low = start_config->cs_active_low; #endif #if SPI_SELECT_MODE == SPI_SELECT_MODE_PAD - spiConfig.ssport = PAL_PORT(slavePin); - spiConfig.sspad = PAL_PAD(slavePin); - gpio_set_pin_output(slavePin); + spiConfig.ssport = PAL_PORT(start_config->slave_pin); + spiConfig.sspad = PAL_PAD(start_config->slave_pin); + gpio_set_pin_output(start_config->slave_pin); #elif SPI_SELECT_MODE == SPI_SELECT_MODE_NONE - if (slavePin != NO_PIN) { - gpio_set_pin_output(slavePin); + if (start_config->slave_pin != NO_PIN) { + gpio_set_pin_output(start_config->slave_pin); } #else # error "Unsupported SPI_SELECT_MODE" #endif spiStart(&SPI_DRIVER, &spiConfig); - spiSelect(&SPI_DRIVER); -#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE - if (slavePin != NO_PIN) { - gpio_write_pin_low(slavePin); - } -#endif + spi_select(); return true; } +bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { + spi_start_config_t start_config = {0}; + start_config.slave_pin = slavePin; + start_config.lsb_first = lsbFirst; + start_config.mode = mode; + start_config.divisor = divisor; + start_config.cs_active_low = true; + return spi_start_extended(&start_config); +} + spi_status_t spi_write(uint8_t data) { uint8_t rxData; spiExchange(&SPI_DRIVER, 1, &data, &rxData); @@ -322,12 +406,7 @@ spi_status_t spi_receive(uint8_t *data, uint16_t length) { void spi_stop(void) { if (spiStarted) { -#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE - if (currentSlavePin != NO_PIN) { - gpio_write_pin_high(currentSlavePin); - } -#endif - spiUnselect(&SPI_DRIVER); + spi_unselect(); spiStop(&SPI_DRIVER); spiStarted = false; } diff --git a/platforms/chibios/drivers/spi_master.h b/platforms/chibios/drivers/spi_master.h index 6a3ce481f1..4ad6144091 100644 --- a/platforms/chibios/drivers/spi_master.h +++ b/platforms/chibios/drivers/spi_master.h @@ -75,9 +75,18 @@ typedef int16_t spi_status_t; #ifdef __cplusplus extern "C" { #endif +typedef struct spi_start_config_t { + pin_t slave_pin; + bool lsb_first; + uint8_t mode; + uint16_t divisor; + bool cs_active_low; +} spi_start_config_t; + void spi_init(void); bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor); +bool spi_start_extended(spi_start_config_t *start_config); spi_status_t spi_write(uint8_t data); diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c index 41a5311719..6cf035e1f2 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c @@ -266,19 +266,36 @@ static inline void sync_ws2812_transfer(void) { busy_wait_until(LAST_TRANSFER); } -void ws2812_setleds(rgb_led_t* ledarray, uint16_t leds) { +ws2812_led_t ws2812_leds[WS2812_LED_COUNT]; + +void ws2812_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { + ws2812_leds[index].r = red; + ws2812_leds[index].g = green; + ws2812_leds[index].b = blue; +#if defined(WS2812_RGBW) + ws2812_rgb_to_rgbw(&ws2812_leds[index]); +#endif +} + +void ws2812_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { + ws2812_set_color(i, red, green, blue); + } +} + +void ws2812_flush(void) { sync_ws2812_transfer(); - for (int i = 0; i < leds; i++) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { #if defined(WS2812_RGBW) - WS2812_BUFFER[i] = rgbw8888_to_u32(ledarray[i].r, ledarray[i].g, ledarray[i].b, ledarray[i].w); + WS2812_BUFFER[i] = rgbw8888_to_u32(ws2812_leds[i].r, ws2812_leds[i].g, ws2812_leds[i].b, ws2812_leds[i].w); #else - WS2812_BUFFER[i] = rgbw8888_to_u32(ledarray[i].r, ledarray[i].g, ledarray[i].b, 0); + WS2812_BUFFER[i] = rgbw8888_to_u32(ws2812_leds[i].r, ws2812_leds[i].g, ws2812_leds[i].b, 0); #endif } dmaChannelSetSourceX(dma_channel, (uint32_t)WS2812_BUFFER); - dmaChannelSetCounterX(dma_channel, leds); + dmaChannelSetCounterX(dma_channel, WS2812_LED_COUNT); dmaChannelSetModeX(dma_channel, RP_DMA_MODE_WS2812); dmaChannelEnableX(dma_channel); } diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c index f49c4a45b0..fed16d20b1 100644 --- a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c +++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c @@ -33,7 +33,7 @@ static inline uint32_t detect_flash_size(void) { #elif defined(FLASH_SIZE) return FLASH_SIZE; #elif defined(FLASHSIZE_BASE) -# if defined(QMK_MCU_SERIES_STM32F0XX) || defined(QMK_MCU_SERIES_STM32F1XX) || defined(QMK_MCU_SERIES_STM32F3XX) || defined(QMK_MCU_SERIES_STM32F4XX) || defined(QMK_MCU_SERIES_STM32G4XX) || defined(QMK_MCU_SERIES_STM32L0XX) || defined(QMK_MCU_SERIES_STM32L4XX) || defined(QMK_MCU_SERIES_GD32VF103) +# if defined(QMK_MCU_SERIES_STM32F0XX) || defined(QMK_MCU_SERIES_STM32F1XX) || defined(QMK_MCU_SERIES_STM32F3XX) || defined(QMK_MCU_SERIES_STM32F4XX) || defined(QMK_MCU_SERIES_STM32G4XX) || defined(QMK_MCU_SERIES_STM32L0XX) || defined(QMK_MCU_SERIES_STM32L4XX) || defined(QMK_MCU_SERIES_AT32F415) || defined(QMK_MCU_SERIES_GD32VF103) return ((*(uint32_t *)FLASHSIZE_BASE) & 0xFFFFU) << 10U; // this register has the flash size in kB, so we convert it to bytes # elif defined(QMK_MCU_SERIES_STM32L1XX) # error This MCU family has an uncommon flash size register definition and has not been implemented. Perhaps try using the true EEPROM on the MCU instead? diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h index 0f0fa694e9..f09f824bd8 100644 --- a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h +++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h @@ -16,6 +16,8 @@ # define BACKING_STORE_WRITE_SIZE 4 // from hal_efl_lld.c # elif defined(QMK_MCU_FAMILY_WB32) # define BACKING_STORE_WRITE_SIZE 8 // from hal_efl_lld.c +# elif defined(QMK_MCU_FAMILY_AT32) +# define BACKING_STORE_WRITE_SIZE 2 // from hal_efl_lld.c # elif defined(QMK_MCU_FAMILY_STM32) # if defined(STM32_FLASH_LINE_SIZE) // from some family's stm32_registry.h file # define BACKING_STORE_WRITE_SIZE (STM32_FLASH_LINE_SIZE) diff --git a/platforms/chibios/drivers/ws2812_bitbang.c b/platforms/chibios/drivers/ws2812_bitbang.c index 96378ec0ac..a88c5ff619 100644 --- a/platforms/chibios/drivers/ws2812_bitbang.c +++ b/platforms/chibios/drivers/ws2812_bitbang.c @@ -11,7 +11,7 @@ /* Adapted from https://github.com/bigjosh/SimpleNeoPixelDemo/ */ #ifndef WS2812_BITBANG_NOP_FUDGE -# if defined(STM32F0XX) || defined(STM32F1XX) || defined(GD32VF103) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) || defined(WB32F3G71xx) || defined(WB32FQ95xx) +# if defined(STM32F0XX) || defined(STM32F1XX) || defined(GD32VF103) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) || defined(WB32F3G71xx) || defined(WB32FQ95xx) || defined(AT32F415) # define WS2812_BITBANG_NOP_FUDGE 0.4 # else # if defined(RP2040) @@ -76,33 +76,49 @@ void sendByte(uint8_t byte) { } } +ws2812_led_t ws2812_leds[WS2812_LED_COUNT]; + void ws2812_init(void) { palSetLineMode(WS2812_DI_PIN, WS2812_OUTPUT_MODE); } -// Setleds for standard RGB -void ws2812_setleds(rgb_led_t *ledarray, uint16_t leds) { +void ws2812_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { + ws2812_leds[index].r = red; + ws2812_leds[index].g = green; + ws2812_leds[index].b = blue; +#if defined(WS2812_RGBW) + ws2812_rgb_to_rgbw(&ws2812_leds[index]); +#endif +} + +void ws2812_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { + ws2812_set_color(i, red, green, blue); + } +} + +void ws2812_flush(void) { // this code is very time dependent, so we need to disable interrupts chSysLock(); - for (uint8_t i = 0; i < leds; i++) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { // WS2812 protocol dictates grb order #if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) - sendByte(ledarray[i].g); - sendByte(ledarray[i].r); - sendByte(ledarray[i].b); + sendByte(ws2812_leds[i].g); + sendByte(ws2812_leds[i].r); + sendByte(ws2812_leds[i].b); #elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB) - sendByte(ledarray[i].r); - sendByte(ledarray[i].g); - sendByte(ledarray[i].b); + sendByte(ws2812_leds[i].r); + sendByte(ws2812_leds[i].g); + sendByte(ws2812_leds[i].b); #elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR) - sendByte(ledarray[i].b); - sendByte(ledarray[i].g); - sendByte(ledarray[i].r); + sendByte(ws2812_leds[i].b); + sendByte(ws2812_leds[i].g); + sendByte(ws2812_leds[i].r); #endif #ifdef WS2812_RGBW - sendByte(ledarray[i].w); + sendByte(ws2812_leds[i].w); #endif } diff --git a/platforms/chibios/drivers/ws2812_pwm.c b/platforms/chibios/drivers/ws2812_pwm.c index 1e9d2ebb41..50927b849a 100644 --- a/platforms/chibios/drivers/ws2812_pwm.c +++ b/platforms/chibios/drivers/ws2812_pwm.c @@ -40,6 +40,9 @@ #if (STM32_DMA_SUPPORTS_DMAMUX == TRUE) && !defined(WS2812_PWM_DMAMUX_ID) # error "please consult your MCU's datasheet and specify in your config.h: #define WS2812_PWM_DMAMUX_ID STM32_DMAMUX1_TIM?_UP" #endif +#if (AT32_DMA_SUPPORTS_DMAMUX == TRUE) && !defined(WS2812_PWM_DMAMUX_CHANNEL) && !defined(WS2812_PWM_DMAMUX_ID) +# error "please consult your MCU's datasheet and specify in your config.h: #define WS2812_PWM_DMAMUX_CHANNEL 1, #define WS2812_PWM_DMAMUX_ID AT32_DMAMUX_TMR?_OVERFLOW" +#endif /* Summarize https://www.st.com/resource/en/application_note/an4013-stm32-crossseries-timer-overview-stmicroelectronics.pdf to * figure out if we are using a 32bit timer. This is needed to setup the DMA controller correctly. @@ -79,15 +82,15 @@ # endif #endif -#ifndef WS2812_PWM_TARGET_PERIOD -//# define WS2812_PWM_TARGET_PERIOD 800000 // Original code is 800k...? -# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1 +// Default is 800000Hz, which has a period of 1.25us +#ifndef WS2812_PWM_FREQUENCY +# define WS2812_PWM_FREQUENCY (1000000000 / WS2812_TIMING) #endif /* --- PRIVATE CONSTANTS ---------------------------------------------------- */ -#define WS2812_PWM_FREQUENCY (CPU_CLOCK / 2) /**< Clock frequency of PWM, must be valid with respect to system clock! */ -#define WS2812_PWM_PERIOD (WS2812_PWM_FREQUENCY / WS2812_PWM_TARGET_PERIOD) /**< Clock period in ticks. 1 / 800kHz = 1.25 uS (as per datasheet) */ +#define WS2812_PWM_TICK_FREQUENCY (CPU_CLOCK / 2) /**< Clock frequency of PWM ticks, must be valid with respect to system clock! */ +#define WS2812_PWM_PERIOD (WS2812_PWM_TICK_FREQUENCY / WS2812_PWM_FREQUENCY) /**< Clock period in PWM ticks. */ /** * @brief Number of bit-periods to hold the data line low at the end of a frame @@ -102,37 +105,16 @@ /** * @brief High period for a zero, in ticks - * - * Per the datasheet: - * WS2812: - * - T0H: 200 nS to 500 nS, inclusive - * - T0L: 650 nS to 950 nS, inclusive - * WS2812B: - * - T0H: 200 nS to 500 nS, inclusive - * - T0L: 750 nS to 1050 nS, inclusive - * - * The duty cycle is calculated for a high period of 350 nS. */ -#define WS2812_DUTYCYCLE_0 (WS2812_PWM_FREQUENCY / (1000000000 / 350)) +#define WS2812_DUTYCYCLE_0 (WS2812_PWM_TICK_FREQUENCY / (1000000000 / WS2812_T0H)) #if (WS2812_DUTYCYCLE_0 > 255) # error WS2812 PWM driver: High period for a 0 is more than a byte #endif /** * @brief High period for a one, in ticks - * - * Per the datasheet: - * WS2812: - * - T1H: 550 nS to 850 nS, inclusive - * - T1L: 450 nS to 750 nS, inclusive - * WS2812B: - * - T1H: 750 nS to 1050 nS, inclusive - * - T1L: 200 nS to 500 nS, inclusive - * - * The duty cycle is calculated for a high period of 800 nS. - * This is in the middle of the specifications of the WS2812 and WS2812B. */ -#define WS2812_DUTYCYCLE_1 (WS2812_PWM_FREQUENCY / (1000000000 / 800)) +#define WS2812_DUTYCYCLE_1 (WS2812_PWM_TICK_FREQUENCY / (1000000000 / WS2812_T1H)) #if (WS2812_DUTYCYCLE_1 > 255) # error WS2812 PWM driver: High period for a 1 is more than a byte #endif @@ -290,6 +272,14 @@ typedef uint32_t ws2812_buffer_t; # define WS2812_PWM_DMA_PERIPHERAL_WIDTH STM32_DMA_CR_PSIZE_HWORD typedef uint16_t ws2812_buffer_t; # endif +#elif defined(AT32F415) +# define WS2812_PWM_DMA_MEMORY_WIDTH AT32_DMA_CCTRL_MWIDTH_BYTE +# if defined(WS2812_PWM_TIMER_32BIT) +# define WS2812_PWM_DMA_PERIPHERAL_WIDTH AT32_DMA_CCTRL_PWIDTH_WORD +# else +# define WS2812_PWM_DMA_PERIPHERAL_WIDTH AT32_DMA_CCTRL_PWIDTH_HWORD +# endif +typedef uint8_t ws2812_buffer_t; #else # define WS2812_PWM_DMA_MEMORY_WIDTH STM32_DMA_CR_MSIZE_BYTE # if defined(WS2812_PWM_TIMER_32BIT) @@ -322,7 +312,7 @@ void ws2812_init(void) { // PWM Configuration //#pragma GCC diagnostic ignored "-Woverride-init" // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config static const PWMConfig ws2812_pwm_config = { - .frequency = WS2812_PWM_FREQUENCY, + .frequency = WS2812_PWM_TICK_FREQUENCY, .period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben .callback = NULL, .channels = @@ -330,8 +320,13 @@ void ws2812_init(void) { [0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled [WS2812_PWM_CHANNEL - 1] = {.mode = WS2812_PWM_OUTPUT_MODE, .callback = NULL}, // Turn on the channel we care about }, +#if defined(AT32F415) + .ctrl2 = 0, + .iden = AT32_TMR_IDEN_OVFDEN, // DMA on update event for next period +#else .cr2 = 0, .dier = TIM_DIER_UDE, // DMA on update event for next period +#endif }; //#pragma GCC diagnostic pop // Restore command-line warning options @@ -342,6 +337,11 @@ void ws2812_init(void) { dmaStreamSetSource(WS2812_PWM_DMA_STREAM, ws2812_frame_buffer); dmaStreamSetDestination(WS2812_PWM_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register dmaStreamSetMode(WS2812_PWM_DMA_STREAM, WB32_DMA_CHCFG_HWHIF(WS2812_PWM_DMA_CHANNEL) | WB32_DMA_CHCFG_DIR_M2P | WB32_DMA_CHCFG_PSIZE_WORD | WB32_DMA_CHCFG_MSIZE_WORD | WB32_DMA_CHCFG_MINC | WB32_DMA_CHCFG_CIRC | WB32_DMA_CHCFG_TCIE | WB32_DMA_CHCFG_PL(3)); +#elif defined(AT32F415) + dmaStreamAlloc(WS2812_PWM_DMA_STREAM - AT32_DMA_STREAM(0), 10, NULL, NULL); + dmaStreamSetPeripheral(WS2812_PWM_DMA_STREAM, &(WS2812_PWM_DRIVER.tmr->CDT[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register + dmaStreamSetMemory0(WS2812_PWM_DMA_STREAM, ws2812_frame_buffer); + dmaStreamSetMode(WS2812_PWM_DMA_STREAM, AT32_DMA_CCTRL_DTD_M2P | WS2812_PWM_DMA_PERIPHERAL_WIDTH | WS2812_PWM_DMA_MEMORY_WIDTH | AT32_DMA_CCTRL_MINCM | AT32_DMA_CCTRL_LM | AT32_DMA_CCTRL_CHPL(3)); #else dmaStreamAlloc(WS2812_PWM_DMA_STREAM - STM32_DMA_STREAM(0), 10, NULL, NULL); dmaStreamSetPeripheral(WS2812_PWM_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register @@ -356,6 +356,11 @@ void ws2812_init(void) { dmaSetRequestSource(WS2812_PWM_DMA_STREAM, WS2812_PWM_DMAMUX_ID); #endif +#if (AT32_DMA_SUPPORTS_DMAMUX == TRUE) + // If the MCU has a DMAMUX we need to assign the correct resource + dmaSetRequestSource(WS2812_PWM_DMA_STREAM, WS2812_PWM_DMAMUX_CHANNEL, WS2812_PWM_DMAMUX_ID); +#endif + // Start DMA dmaStreamEnable(WS2812_PWM_DMA_STREAM); @@ -387,13 +392,29 @@ void ws2812_write_led_rgbw(uint16_t led_number, uint8_t r, uint8_t g, uint8_t b, } } -// Setleds for standard RGB -void ws2812_setleds(rgb_led_t* ledarray, uint16_t leds) { - for (uint16_t i = 0; i < leds; i++) { -#ifdef WS2812_RGBW - ws2812_write_led_rgbw(i, ledarray[i].r, ledarray[i].g, ledarray[i].b, ledarray[i].w); +ws2812_led_t ws2812_leds[WS2812_LED_COUNT]; + +void ws2812_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { + ws2812_leds[index].r = red; + ws2812_leds[index].g = green; + ws2812_leds[index].b = blue; +#if defined(WS2812_RGBW) + ws2812_rgb_to_rgbw(&ws2812_leds[index]); +#endif +} + +void ws2812_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { + ws2812_set_color(i, red, green, blue); + } +} + +void ws2812_flush(void) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { +#if defined(WS2812_RGBW) + ws2812_write_led_rgbw(i, ws2812_leds[i].r, ws2812_leds[i].g, ws2812_leds[i].b, ws2812_leds[i].w); #else - ws2812_write_led(i, ledarray[i].r, ledarray[i].g, ledarray[i].b); + ws2812_write_led(i, ws2812_leds[i].r, ws2812_leds[i].g, ws2812_leds[i].b); #endif } } diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index 9896f9e69d..d1792b871b 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -40,26 +40,53 @@ // Define SPI config speed // baudrate should target 3.2MHz +#if defined(AT32F415) +# if WS2812_SPI_DIVISOR == 2 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (0) +# elif WS2812_SPI_DIVISOR == 4 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 8 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_1) +# elif WS2812_SPI_DIVISOR == 16 // default +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 32 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2) +# elif WS2812_SPI_DIVISOR == 64 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 128 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1) +# elif WS2812_SPI_DIVISOR == 256 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 512 +# define WS2812_SPI_DIVISOR_CTRL2_MDIV_X (SPI_CTRL1_MDIV_3) +# elif WS2812_SPI_DIVISOR == 1024 +# define WS2812_SPI_DIVISOR_CTRL2_MDIV_X (SPI_CTRL1_MDIV_3) +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_0) +# else +# error "Configured WS2812_SPI_DIVISOR value is not supported at this time." +# endif +#else // F072 fpclk = 48MHz // 48/16 = 3Mhz -#if WS2812_SPI_DIVISOR == 2 -# define WS2812_SPI_DIVISOR_CR1_BR_X (0) -#elif WS2812_SPI_DIVISOR == 4 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0) -#elif WS2812_SPI_DIVISOR == 8 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1) -#elif WS2812_SPI_DIVISOR == 16 // default -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) -#elif WS2812_SPI_DIVISOR == 32 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2) -#elif WS2812_SPI_DIVISOR == 64 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0) -#elif WS2812_SPI_DIVISOR == 128 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1) -#elif WS2812_SPI_DIVISOR == 256 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) -#else -# error "Configured WS2812_SPI_DIVISOR value is not supported at this time." +# if WS2812_SPI_DIVISOR == 2 +# define WS2812_SPI_DIVISOR_CR1_BR_X (0) +# elif WS2812_SPI_DIVISOR == 4 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0) +# elif WS2812_SPI_DIVISOR == 8 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1) +# elif WS2812_SPI_DIVISOR == 16 // default +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) +# elif WS2812_SPI_DIVISOR == 32 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2) +# elif WS2812_SPI_DIVISOR == 64 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0) +# elif WS2812_SPI_DIVISOR == 128 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1) +# elif WS2812_SPI_DIVISOR == 256 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) +# else +# error "Configured WS2812_SPI_DIVISOR value is not supported at this time." +# endif #endif // Use SPI circular buffer @@ -106,7 +133,7 @@ static uint8_t get_protocol_eq(uint8_t data, int pos) { return eq; } -static void set_led_color_rgb(rgb_led_t color, int pos) { +static void set_led_color_rgb(ws2812_led_t color, int pos) { uint8_t* tx_start = &txbuf[PREAMBLE_SIZE]; #if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) @@ -137,6 +164,8 @@ static void set_led_color_rgb(rgb_led_t color, int pos) { #endif } +ws2812_led_t ws2812_leds[WS2812_LED_COUNT]; + void ws2812_init(void) { palSetLineMode(WS2812_DI_PIN, WS2812_MOSI_OUTPUT_MODE); @@ -174,8 +203,16 @@ void ws2812_init(void) { NULL, // error_cb PAL_PORT(WS2812_DI_PIN), PAL_PAD(WS2812_DI_PIN), +# if defined(AT32F415) + WS2812_SPI_DIVISOR_CTRL1_MDIV_X, +# if (WS2812_SPI_DIVISOR == 512 || WS2812_SPI_DIVISOR == 1024) + WS2812_SPI_DIVISOR_CTRL2_MDIV_X, +# endif + 0 +# else WS2812_SPI_DIVISOR_CR1_BR_X, 0 +# endif #endif }; @@ -187,9 +224,24 @@ void ws2812_init(void) { #endif } -void ws2812_setleds(rgb_led_t* ledarray, uint16_t leds) { - for (uint8_t i = 0; i < leds; i++) { - set_led_color_rgb(ledarray[i], i); +void ws2812_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { + ws2812_leds[index].r = red; + ws2812_leds[index].g = green; + ws2812_leds[index].b = blue; +#if defined(WS2812_RGBW) + ws2812_rgb_to_rgbw(&ws2812_leds[index]); +#endif +} + +void ws2812_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { + ws2812_set_color(i, red, green, blue); + } +} + +void ws2812_flush(void) { + for (int i = 0; i < WS2812_LED_COUNT; i++) { + set_led_color_rgb(ws2812_leds[i], i); } // Send async - each led takes ~0.03ms, 50 leds ~1.5ms, animations flushing faster than send will cause issues. diff --git a/platforms/chibios/flash.mk b/platforms/chibios/flash.mk index 525f177f9e..f4db17a58b 100644 --- a/platforms/chibios/flash.mk +++ b/platforms/chibios/flash.mk @@ -113,6 +113,8 @@ else ifeq ($(strip $(MCU_FAMILY)),STM32) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU_UTIL) else ifeq ($(strip $(MCU_FAMILY)),WB32) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_WB32_DFU_UPDATER) +else ifeq ($(strip $(MCU_FAMILY)),AT32) + $(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU_UTIL) else ifeq ($(strip $(MCU_FAMILY)),GD32V) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU_UTIL) else diff --git a/platforms/chibios/mcu_selection.mk b/platforms/chibios/mcu_selection.mk index a1597fa1e9..086a2b31c6 100644 --- a/platforms/chibios/mcu_selection.mk +++ b/platforms/chibios/mcu_selection.mk @@ -809,6 +809,40 @@ ifneq ($(findstring WB32FQ95, $(MCU)),) WB32_BOOTLOADER_ADDRESS ?= 0x1FFFE000 endif +ifneq ($(findstring AT32F415, $(MCU)),) + # Cortex version + MCU = cortex-m4 + + # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 + ARMV = 7 + + ## chip/board settings + # - the next two should match the directories in + # <chibios[-contrib]>/os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES) + # OR + # <chibios[-contrib]>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + MCU_FAMILY = AT32 + MCU_SERIES = AT32F415 + + # Linker script to use + # - it should exist either in <chibios>/os/common/startup/ARMCMx/compilers/GCC/ld/ + # or <keyboard_dir>/ld/ + MCU_LDSCRIPT ?= AT32F415xB + + # Startup code to use + # - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ + MCU_STARTUP ?= at32f415 + + # Board: it should exist either in <chibios>/os/hal/boards/, + # <keyboard_dir>/boards/, or drivers/boards/ + BOARD ?= GENERIC_AT32_F415XX + + USE_FPU ?= no + + # Bootloader address for AT32 DFU + AT32_BOOTLOADER_ADDRESS ?= 0x1FFFAC00 +endif + ifneq ($(findstring GD32VF103, $(MCU)),) # RISC-V MCU = risc-v diff --git a/platforms/chibios/platform.mk b/platforms/chibios/platform.mk index 169707966f..cf9fac251e 100644 --- a/platforms/chibios/platform.mk +++ b/platforms/chibios/platform.mk @@ -155,6 +155,10 @@ ifdef WB32_BOOTLOADER_ADDRESS OPT_DEFS += -DWB32_BOOTLOADER_ADDRESS=$(WB32_BOOTLOADER_ADDRESS) endif +ifdef AT32_BOOTLOADER_ADDRESS + OPT_DEFS += -DAT32_BOOTLOADER_ADDRESS=$(AT32_BOOTLOADER_ADDRESS) +endif + # Work out if we need to set up the include for the bootloader definitions ifneq ("$(wildcard $(KEYBOARD_PATH_5)/bootloader_defs.h)","") OPT_DEFS += -include $(KEYBOARD_PATH_5)/bootloader_defs.h diff --git a/platforms/chibios/timer.c b/platforms/chibios/timer.c index 5e01ea6372..4a347b445d 100644 --- a/platforms/chibios/timer.c +++ b/platforms/chibios/timer.c @@ -5,6 +5,7 @@ static uint32_t ticks_offset = 0; static uint32_t last_ticks = 0; static uint32_t ms_offset = 0; +static uint32_t saved_ms = 0; #if CH_CFG_ST_RESOLUTION < 32 static uint32_t last_systime = 0; static uint32_t overflow = 0; @@ -73,6 +74,26 @@ void timer_clear(void) { chSysUnlock(); } +__attribute__((weak)) void platform_timer_save_value(uint32_t value) { + saved_ms = value; +} + +__attribute__((weak)) uint32_t platform_timer_restore_value(void) { + return saved_ms; +} + +void timer_restore(void) { + chSysLock(); + ticks_offset = get_system_time_ticks(); + last_ticks = 0; + ms_offset = platform_timer_restore_value(); + chSysUnlock(); +} + +void timer_save(void) { + platform_timer_save_value(timer_read32()); +} + uint16_t timer_read(void) { return (uint16_t)timer_read32(); } |