diff options
20 files changed, 1763 insertions, 4 deletions
| diff --git a/builddefs/mcu_selection.mk b/builddefs/mcu_selection.mk index 1251b7a2b7..46d34aabe4 100644 --- a/builddefs/mcu_selection.mk +++ b/builddefs/mcu_selection.mk @@ -540,10 +540,39 @@ ifneq (,$(filter $(MCU),STM32L412 STM32L422))    UF2_FAMILY ?= STM32L4  endif +ifneq ($(findstring WB32F3G71, $(MCU)),) +  # Cortex version +  MCU = cortex-m3 + +  # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 +  ARMV = 7 + +  ## chip/board settings +  # - the next two should match the directories in +  #   <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) +  MCU_FAMILY = WB32 +  MCU_SERIES = WB32F3G71xx + +  # Linker script to use +  # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ +  #   or <keyboard_dir>/ld/ +  MCU_LDSCRIPT ?= WB32F3G71x9 + +  # Startup code to use +  #  - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ +  MCU_STARTUP ?= wb32f3g71xx + +  # Board: it should exist either in <chibios>/os/hal/boards/, +  # <keyboard_dir>/boards/, or drivers/boards/ +  BOARD ?= GENERIC_WB32_F3G71XX + +  USE_FPU ?= no +endif +  ifneq ($(findstring GD32VF103, $(MCU)),)    # RISC-V    MCU = risc-v -   +    # RISC-V extensions and abi configuration    MCU_ARCH = rv32imac    MCU_ABI = ilp32 diff --git a/data/schemas/keyboard.jsonschema b/data/schemas/keyboard.jsonschema index 37a0643ab2..308f9b782b 100644 --- a/data/schemas/keyboard.jsonschema +++ b/data/schemas/keyboard.jsonschema @@ -13,7 +13,7 @@          },          "processor": {              "type": "string", -            "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L433", "STM32L443", "GD32VF103", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"] +            "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L433", "STM32L443", "GD32VF103", "WB32F3G71", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]          },          "audio": {              "type": "object", @@ -57,7 +57,7 @@          },          "bootloader": {              "type": "string", -            "enum": ["atmel-dfu", "bootloadhid", "bootloadHID", "caterina", "halfkay", "kiibohd", "lufa-dfu", "lufa-ms", "micronucleus", "qmk-dfu", "qmk-hid", "stm32-dfu", "stm32duino", "gd32v-dfu", "unknown", "usbasploader", "USBasp", "tinyuf2"], +            "enum": ["atmel-dfu", "bootloadhid", "bootloadHID", "caterina", "halfkay", "kiibohd", "lufa-dfu", "lufa-ms", "micronucleus", "qmk-dfu", "qmk-hid", "stm32-dfu", "stm32duino", "gd32v-dfu", "wb32-dfu", "unknown", "usbasploader", "USBasp", "tinyuf2"],          },          "bootloader_instructions": {              "type": "string", diff --git a/docs/compatible_microcontrollers.md b/docs/compatible_microcontrollers.md index 39e9061c20..eb3e2c3e57 100644 --- a/docs/compatible_microcontrollers.md +++ b/docs/compatible_microcontrollers.md @@ -37,6 +37,10 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s   * [STM32L422](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x2.html)   * [STM32L433](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)   * [STM32L443](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html) +  + ### WestBerryTech (WB32) + + * [WB32F3G71xx](http://www.westberrytech.com)  ### NXP (Kinetis) diff --git a/lib/python/qmk/constants.py b/lib/python/qmk/constants.py index 73f596ba2c..754091a97e 100644 --- a/lib/python/qmk/constants.py +++ b/lib/python/qmk/constants.py @@ -13,7 +13,7 @@ QMK_FIRMWARE_UPSTREAM = 'qmk/qmk_firmware'  MAX_KEYBOARD_SUBFOLDERS = 5  # Supported processor types -CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L433', 'STM32L443', 'GD32VF103' +CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L433', 'STM32L443', 'GD32VF103', 'WB32F3G71'  LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None  VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85' diff --git a/lib/python/qmk/info.py b/lib/python/qmk/info.py index dc42fdd4d9..9a07fc842f 100644 --- a/lib/python/qmk/info.py +++ b/lib/python/qmk/info.py @@ -624,6 +624,8 @@ def arm_processor_rules(info_data, rules):      if 'bootloader' not in info_data:          if 'STM32' in info_data['processor']:              info_data['bootloader'] = 'stm32-dfu' +        elif 'WB32' in info_data['processor']: +            info_data['bootloader'] = 'wb32-dfu'          else:              info_data['bootloader'] = 'unknown' diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c new file mode 100644 index 0000000000..e38a7e0054 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c @@ -0,0 +1,82 @@ +/* +    Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#include "hal.h" + +/*===========================================================================*/ +/* Driver local definitions.                                                 */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables.                                                */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types.                                         */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions.                                                   */ +/*===========================================================================*/ + +static void wb32_gpio_init(void) { + +#if WB32_HAS_GPIOA +  rccEnableAPB1(RCC_APB1ENR_GPIOAEN); +#endif + +#if WB32_HAS_GPIOB +  rccEnableAPB1(RCC_APB1ENR_GPIOBEN); +#endif + +#if WB32_HAS_GPIOC +  rccEnableAPB1(RCC_APB1ENR_GPIOCEN); +#endif + +#if WB32_HAS_GPIOD +  rccEnableAPB1(RCC_APB1ENR_GPIODEN); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers.                                                */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions.                                                */ +/*===========================================================================*/ +/* + * Early initialization code. + * This initialization must be performed just after stack setup and before + * any other initialization. + */ +void __early_init(void) { + +  wb32_clock_init(); +  wb32_gpio_init(); +} +/** + * @brief   Board-specific initialization code. + * @note    You can add your board-specific code here. + */ +void boardInit(void) { + +} diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.h b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.h new file mode 100644 index 0000000000..51dc84db94 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.h @@ -0,0 +1,56 @@ +#pragma once +/* +    Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#ifndef BOARD_H +#define BOARD_H + +/*===========================================================================*/ +/* Driver constants.                                                         */ +/*===========================================================================*/ + +/* + * Setup board. + */ + +/* + * Board identifier. + */ +#define WB32F3G71x9 +#if !defined(WB32F3G71xx) +  #define WB32F3G71xx +#endif + +/*===========================================================================*/ +/* External declarations.                                                    */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif +  void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* BOARD_H */ diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.mk b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.mk new file mode 100644 index 0000000000..842e335905 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/board/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC  += $(BOARDINC) diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/bootloader_defs.h b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/bootloader_defs.h new file mode 100644 index 0000000000..c929d2ad03 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/bootloader_defs.h @@ -0,0 +1,12 @@ +/* Address for jumping to bootloader on WB32 chips. */ +/* It is chip dependent, the correct number can be looked up here: + * http://www.westberrytech.com/down/mcu/data/WB32F3G71xx_rm.pdf + */ +#ifndef WB32_BOOTLOADER_ADDRESS +#    undef STM32_BOOTLOADER_ADDRESS +#    define WB32_BOOTLOADER_ADDRESS 0x1FFFE000 +#    define STM32_BOOTLOADER_ADDRESS WB32_BOOTLOADER_ADDRESS +#else +#    undef STM32_BOOTLOADER_ADDRESS +#    define STM32_BOOTLOADER_ADDRESS WB32_BOOTLOADER_ADDRESS +#endif diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/chconf.h b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/chconf.h new file mode 100644 index 0000000000..1b8bd5d84a --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/chconf.h @@ -0,0 +1,757 @@ +/* +    Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/** + * @file    rt/templates/chconf.h + * @brief   Configuration file template. + * @details A copy of this file must be placed in each project directory, it + *          contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   System time counter resolution. + * @note    Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION                32 +#endif + +/** + * @brief   System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + *          setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY                 10000 +#endif + +/** + * @brief   Time intervals data size. + * @note    Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE               32 +#endif + +/** + * @brief   Time types data size. + * @note    Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE              32 +#endif + +/** + * @brief   Time delta constant for the tick-less mode. + * @note    If this value is zero then the system uses the classic + *          periodic tick. This value represents the minimum number + *          of ticks that is safe to specify in a timeout directive. + *          The value one is not valid, timeouts are rounded up to + *          this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA                 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Round robin interval. + * @details This constant is the number of system ticks allowed for the + *          threads before preemption occurs. Setting this value to zero + *          disables the preemption for threads with equal priority and the + *          round robin becomes cooperative. Note that higher priority + *          threads can still preempt, the kernel is always preemptive. + * @note    Disabling the round robin preemption makes the kernel more compact + *          and generally faster. + * @note    The round robin preemption is not supported in tickless mode and + *          must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM                 0 +#endif + +/** + * @brief   Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + *          does not spawn the idle thread. The application @p main() + *          function becomes the idle thread and must implement an + *          infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD               FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   OS optimization. + * @details If enabled then time efficient rather than space efficient code + *          is used when two possible implementations exist. + * + * @note    This is not related to the compiler optimization options. + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED               TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + *          the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM                       TRUE +#endif + +/** + * @brief   Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY                 TRUE +#endif + +/** + * @brief   Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + *          the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT                 TRUE +#endif + +/** + * @brief   Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES               TRUE +#endif + +/** + * @brief   Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + *          priority rather than in FIFO order. + * + * @note    The default is @p FALSE. Enable this if you have special + *          requirements. + * @note    Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE +#endif + +/** + * @brief   Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES                  TRUE +#endif + +/** + * @brief   Enables recursive behavior on mutexes. + * @note    Recursive mutexes are heavier and have an increased + *          memory footprint. + * + * @note    The default is @p FALSE. + * @note    Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE +#endif + +/** + * @brief   Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS                 TRUE +#endif + +/** + * @brief   Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + *          specification are included in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE +#endif + +/** + * @brief   Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS                   TRUE +#endif + +/** + * @brief   Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + *          are included in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE +#endif + +/** + * @brief   Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES                 TRUE +#endif + +/** + * @brief   Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + *          FIFO order. + * + * @note    The default is @p FALSE. Enable this if you have special + *          requirements. + * @note    Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE +#endif + +/** + * @brief   Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_WAITEXIT. + * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC                  TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + *          included in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES                TRUE +#endif + +/** + * @brief   Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE                  TRUE +#endif + +/** + * @brief   Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + *          then the whole available RAM is used. The core memory is made + *          available to the heap allocator and/or can be used directly through + *          the simplified core memory allocator. + * + * @note    In order to let the OS manage the whole RAM the linker script must + *          provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note    Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE                 0 +#endif + +/** + * @brief   Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + *          @p CH_CFG_USE_SEMAPHORES. + * @note    Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP                     TRUE +#endif + +/** + * @brief   Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS                 TRUE +#endif + +/** + * @brief   Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS                TRUE +#endif + +/** + * @brief   Pipes APIs. + * @details If enabled then the pipes APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES                    TRUE +#endif + +/** + * @brief   Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES               TRUE +#endif + +/** + * @brief   Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES                TRUE +#endif + +/** + * @brief   Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS                     TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + *          kernel. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY                  TRUE +#endif + +/** + * @brief   Maximum length for object names. + * @details If the specified length is zero then the name is stored by + *          pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH     8 +#endif + +/** + * @brief   Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY     TRUE +#endif + +/** + * @brief   Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS      TRUE +#endif + +/** + * @brief   Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES           TRUE +#endif + +/** + * @brief   Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES            TRUE +#endif + +/** + * @brief   Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS            TRUE +#endif + +/** + * @brief   Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES                TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Debug option, kernel statistics. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS                   FALSE +#endif + +/** + * @brief   Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + *          at runtime. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK           FALSE +#endif + +/** + * @brief   Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + *          parameters are activated. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS                TRUE +#endif + +/** + * @brief   Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + *          activated. This includes consistency checks inside the kernel, + *          runtime anomalies and port-defined checks. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS               FALSE +#endif + +/** + * @brief   Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief   Trace buffer entries. + * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + *          different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE            128 +#endif + +/** + * @brief   Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note    The default is @p FALSE. + * @note    The stack check is performed in a architecture/port dependent way. + *          It may not be implemented or some ports. + * @note    The default failure mode is to halt the system with the global + *          @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK           TRUE +#endif + +/** + * @brief   Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + *          value when a thread is created. This can be useful for the + *          runtime measurement of the used stack. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS                 TRUE +#endif + +/** + * @brief   Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + *          counts the system ticks occurred while executing the thread. + * + * @note    The default is @p FALSE. + * @note    This debug option is not currently compatible with the + *          tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING            FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS                                          \ +  /* Add threads custom fields here.*/ + +/** + * @brief   System initialization hook. + * @details User initialization code added to the @p chSysInit() function + *          just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() {                                         \ +  /* Add threads initialization code here.*/                                \ +} + +/** + * @brief   Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS                                          \ +  /* Add threads custom fields here.*/ + +/** + * @brief   Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note    It is invoked from within @p _thread_init() and implicitly from all + *          the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \ +  /* Add threads initialization code here.*/                                \ +} + +/** + * @brief   Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \ +  /* Add threads finalization code here.*/                                  \ +} + +/** + * @brief   Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \ +  /* Context switch code here.*/                                            \ +} + +/** + * @brief   ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \ +  /* IRQ prologue code here.*/                                              \ +} + +/** + * @brief   ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \ +  /* IRQ epilogue code here.*/                                              \ +} + +/** + * @brief   Idle thread enter hook. + * @note    This hook is invoked within a critical zone, no OS functions + *          should be invoked from here. + * @note    This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() {                                          \ +  /* Idle-enter code here.*/                                                \ +} + +/** + * @brief   Idle thread leave hook. + * @note    This hook is invoked within a critical zone, no OS functions + *          should be invoked from here. + * @note    This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \ +  /* Idle-leave code here.*/                                                \ +} + +/** + * @brief   Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() {                                           \ +  /* Idle loop code here.*/                                                 \ +} + +/** + * @brief   System tick event hook. + * @details This hook is invoked in the system tick handler immediately + *          after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \ +  /* System tick event code here.*/                                         \ +} + +/** + * @brief   System halt hook. + * @details This hook is invoked in case to a system halting error before + *          the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \ +  /* System halt code here.*/                                               \ +} + +/** + * @brief   Trace hook. + * @details This hook is invoked each time a new record is written in the + *          trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) {                                            \ +  /* Trace code here.*/                                                     \ +} + + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h).    */ +/*===========================================================================*/ + +#endif  /* CHCONF_H */ + +/** @} */ diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/config.h b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/config.h new file mode 100644 index 0000000000..3d3e1165e4 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/config.h @@ -0,0 +1,20 @@ +/*  Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ +#pragma once + +#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP +#    define EARLY_INIT_PERFORM_BOOTLOADER_JUMP FALSE +#endif diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/halconf.h b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/halconf.h new file mode 100644 index 0000000000..ac6ec9eade --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/halconf.h @@ -0,0 +1,532 @@ +/* +    Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/** + * @file    templates/halconf.h + * @brief   HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + *          various device drivers from your application. You may also use + *          this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ + +#include "mcuconf.h" + +/** + * @brief   Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL                         TRUE +#endif + +/** + * @brief   Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC                         FALSE +#endif + +/** + * @brief   Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN                         FALSE +#endif + +/** + * @brief   Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY                         FALSE +#endif + +/** + * @brief   Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC                         FALSE +#endif + +/** + * @brief   Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL                         FALSE +#endif + +/** + * @brief   Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT                         FALSE +#endif + +/** + * @brief   Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C                         FALSE +#endif + +/** + * @brief   Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S                         FALSE +#endif + +/** + * @brief   Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU                         FALSE +#endif + +/** + * @brief   Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC                         FALSE +#endif + +/** + * @brief   Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI                     FALSE +#endif + +/** + * @brief   Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM                         FALSE +#endif + +/** + * @brief   Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC                         FALSE +#endif + +/** + * @brief   Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC                         FALSE +#endif + +/** + * @brief   Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL                      FALSE +#endif + +/** + * @brief   Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB                  FALSE +#endif + +/** + * @brief   Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO                         FALSE +#endif + +/** + * @brief   Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI                         FALSE +#endif + +/** + * @brief   Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG                        FALSE +#endif + +/** + * @brief   Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART                        FALSE +#endif + +/** + * @brief   Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB                         TRUE +#endif + +/** + * @brief   Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG                         FALSE +#endif + +/** + * @brief   Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI                        FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS                   FALSE           // additional : The original is FALSE +#endif + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT                        FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT                        FALSE +#endif + +/** + * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE                  FALSE +#endif + +/** + * @brief   Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS           FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + *          implementation for algorithms not supported by the underlying + *          hardware. + * @note    Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK                FALSE +#endif + +/** + * @brief   Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK            FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT                        FALSE +#endif + +/** + * @brief   Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY                   FALSE +#endif + +/** + * @brief   Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS                      FALSE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings.                                          */ +/*===========================================================================*/ + +/** + * @brief   Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + *          routines releasing some extra CPU time for the threads with + *          lower priority, this may slow down the driver a bit however. + *          This option is recommended also if the SPI driver does not + *          use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING                    FALSE +#endif + +/*===========================================================================*/ +/* SDC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Number of initialization attempts before rejecting the card. + * @note    Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY                      100 +#endif + +/** + * @brief   Include support for MMC cards. + * @note    MMC support is not yet implemented so this option must be kept + *          at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT                     FALSE +#endif + +/** + * @brief   Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + *          routines releasing some extra CPU time for the threads with + *          lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING                    TRUE +#endif + +/** + * @brief   OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20                    0x50FF8000U +#endif + +/** + * @brief   OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR                        0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings.                                           */ +/*===========================================================================*/ + +/** + * @brief   Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + *          default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE              38400 +#endif + +/** + * @brief   Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + *          buffers depending on the requirements of your application. + * @note    The default is 16 bytes for both the transmission and receive + *          buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE                 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting.                                        */ +/*===========================================================================*/ + +/** + * @brief   Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + *          the USB data endpoint maximum packet size. + * @note    The default is 256 bytes for both the transmission and receive + *          buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE             256 +#endif + +/** + * @brief   Serial over USB number of buffers. + * @note    The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER           2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT                        TRUE +#endif + +/** + * @brief   Enables circular transfers APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR                    FALSE +#endif + + +/** + * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/** + * @brief   Handling method for SPI CS line. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE                     SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings.                                             */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT                       FALSE +#endif + +/** + * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION           FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT                        TRUE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings.                                             */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT                       TRUE +#endif + +/** + * @brief   Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION           TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/mcuconf.h new file mode 100644 index 0000000000..7c1fdaf57d --- /dev/null +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/mcuconf.h @@ -0,0 +1,168 @@ +/* +    Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +#define WB32F3G71xx_MCUCONF  TRUE + +/* + * WB32F3G71 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0       Lowest...Highest. + * + */ + +/** + * @name    Internal clock sources + * @{ + */ +#define WB32_HSECLK                        12000000 +#define WB32_LSECLK                        32768 + +/* + * HAL driver system settings. + */ +#define WB32_NO_INIT                       FALSE +#define WB32_MHSI_ENABLED                  TRUE +#define WB32_FHSI_ENABLED                  FALSE +#define WB32_LSI_ENABLED                   FALSE +#define WB32_HSE_ENABLED                   TRUE +#define WB32_LSE_ENABLED                   FALSE +#define WB32_PLL_ENABLED                   TRUE +#define WB32_MAINCLKSRC                    WB32_MAINCLKSRC_PLL +#define WB32_PLLSRC                        WB32_PLLSRC_HSE +#define WB32_PLLDIV_VALUE                  2 +#define WB32_PLLMUL_VALUE                  12     //The allowed range is 12,16,20,24. +#define WB32_HPRE                          1 +#define WB32_PPRE1                         1 +#define WB32_PPRE2                         1 +#define WB32_USBPRE                        WB32_USBPRE_DIV1P5 + +/* + * EXTI driver system settings. + */ +#define WB32_IRQ_EXTI0_PRIORITY            6 +#define WB32_IRQ_EXTI1_PRIORITY            6 +#define WB32_IRQ_EXTI2_PRIORITY            6 +#define WB32_IRQ_EXTI3_PRIORITY            6 +#define WB32_IRQ_EXTI4_PRIORITY            6 +#define WB32_IRQ_EXTI5_9_PRIORITY          6 +#define WB32_IRQ_EXTI10_15_PRIORITY        6 +#define WB32_IRQ_EXTI16_PRIORITY           6 +#define WB32_IRQ_EXTI17_PRIORITY           6 +#define WB32_IRQ_EXTI18_PRIORITY           6 +#define WB32_IRQ_EXTI19_PRIORITY           6 + +/* + * GPT driver system settings. + */ +#define WB32_TIM_MAX_CHANNELS              4 +#define WB32_GPT_USE_TIM1                  FALSE +#define WB32_GPT_USE_TIM2                  FALSE +#define WB32_GPT_USE_TIM3                  FALSE +#define WB32_GPT_USE_TIM4                  FALSE +#define WB32_GPT_TIM1_IRQ_PRIORITY         7 +#define WB32_GPT_TIM2_IRQ_PRIORITY         7 +#define WB32_GPT_TIM3_IRQ_PRIORITY         7 +#define WB32_GPT_TIM4_IRQ_PRIORITY         7 + +/* + * ICU driver system settings. + */ +#define WB32_ICU_USE_TIM1                  FALSE +#define WB32_ICU_USE_TIM2                  FALSE +#define WB32_ICU_USE_TIM3                  FALSE +#define WB32_ICU_USE_TIM4                  FALSE +#define WB32_ICU_TIM1_IRQ_PRIORITY         7 +#define WB32_ICU_TIM2_IRQ_PRIORITY         7 +#define WB32_ICU_TIM3_IRQ_PRIORITY         7 +#define WB32_ICU_TIM4_IRQ_PRIORITY         7 + +/* + * PWM driver system settings. + */ +#define WB32_PWM_USE_ADVANCED              FALSE +#define WB32_PWM_USE_TIM1                  FALSE +#define WB32_PWM_USE_TIM2                  FALSE +#define WB32_PWM_USE_TIM3                  FALSE +#define WB32_PWM_USE_TIM4                  FALSE +#define WB32_PWM_TIM1_IRQ_PRIORITY         7 +#define WB32_PWM_TIM2_IRQ_PRIORITY         7 +#define WB32_PWM_TIM3_IRQ_PRIORITY         7 +#define WB32_PWM_TIM4_IRQ_PRIORITY         7 + +/* + * I2C driver system settings. + */ +#define WB32_I2C_USE_I2C1                  FALSE +#define WB32_I2C_USE_I2C2                  FALSE +#define WB32_I2C_BUSY_TIMEOUT              50 +#define WB32_I2C_I2C1_IRQ_PRIORITY         5 +#define WB32_I2C_I2C2_IRQ_PRIORITY         5 + +/* + * SERIAL driver system settings. + */ +#define WB32_SERIAL_USE_UART1             FALSE +#define WB32_SERIAL_USE_UART2             FALSE +#define WB32_SERIAL_USE_UART3             FALSE +#define WB32_SERIAL_USART1_PRIORITY        12 +#define WB32_SERIAL_USART2_PRIORITY        12 +#define WB32_SERIAL_USART3_PRIORITY        12 + +/* + * SPI driver system settings. + */ +#define WB32_SPI_USE_QSPI                   FALSE +#define WB32_SPI_USE_SPIM2                  FALSE +#define WB32_SPI_USE_SPIS1                  FALSE +#define WB32_SPI_USE_SPIS2                  FALSE +#define WB32_SPI_QSPI_IRQ_PRIORITY          10 +#define WB32_SPI_SPIM2_IRQ_PRIORITY         10 +#define WB32_SPI_SPIS1_IRQ_PRIORITY         10 +#define WB32_SPI_SPIS2_IRQ_PRIORITY         10 + +/* + * ST driver system settings. + */ +#define WB32_ST_IRQ_PRIORITY                8 +#define WB32_ST_USE_TIMER                   2 + +/* + * UART driver system settings. + */ +#define WB32_UART_USE_UART1                 FALSE +#define WB32_UART_USE_UART2                 FALSE +#define WB32_UART_USE_UART3                 FALSE +#define WB32_UART_UART1_IRQ_PRIORITY        12 +#define WB32_UART_UART2_IRQ_PRIORITY        12 +#define WB32_UART_UART3_IRQ_PRIORITY        12 + +/* + * USB driver system settings. + */ +#define WB32_USB_USE_USB1                   TRUE +#define WB32_USB_USB1_IRQ_PRIORITY          13 +#define WB32_USB_HOST_WAKEUP_DURATION       10 + + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/chibios_config.h b/platforms/chibios/chibios_config.h index ad2f808a95..4e35736606 100644 --- a/platforms/chibios/chibios_config.h +++ b/platforms/chibios/chibios_config.h @@ -51,6 +51,18 @@  #    endif  #endif +// WB32 compatibility +#if defined(MCU_WB32) +#    define CPU_CLOCK WB32_MAINCLK + +#    if defined(WB32F3G71xx) +#        define PAL_OUTPUT_TYPE_OPENDRAIN PAL_WB32_OTYPE_OPENDRAIN +#        define PAL_OUTPUT_TYPE_PUSHPULL PAL_WB32_OTYPE_PUSHPULL +#        define PAL_OUTPUT_SPEED_HIGHEST PAL_WB32_OSPEED_HIGH +#        define PAL_PUPDR_FLOATING PAL_WB32_PUPDR_FLOATING +#    endif +#endif +  #if defined(GD32VF103)  /* This chip has the same API as STM32F103, but uses different names for literally the same thing.   * As of 4.7.2021 QMK is tailored to use STM32 defines/names, for compatibility sake diff --git a/platforms/chibios/drivers/i2c_master.c b/platforms/chibios/drivers/i2c_master.c index 63e85ae87d..43591d56f8 100644 --- a/platforms/chibios/drivers/i2c_master.c +++ b/platforms/chibios/drivers/i2c_master.c @@ -38,6 +38,9 @@ static const I2CConfig i2cconfig = {      I2C1_OPMODE,      I2C1_CLOCK_SPEED,      I2C1_DUTY_CYCLE, +#elif defined(WB32F3G71xx) +    I2C1_OPMODE, +    I2C1_CLOCK_SPEED,  #else      // This configures the I2C clock to 400khz assuming a 72Mhz clock      // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html diff --git a/platforms/chibios/drivers/spi_master.c b/platforms/chibios/drivers/spi_master.c index c592369dde..dde0bb0597 100644 --- a/platforms/chibios/drivers/spi_master.c +++ b/platforms/chibios/drivers/spi_master.c @@ -54,6 +54,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {          return false;      } +#ifndef WB32F3G71xx      uint16_t roundedDivisor = 2;      while (roundedDivisor < divisor) {          roundedDivisor <<= 1; @@ -62,6 +63,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {      if (roundedDivisor < 2 || roundedDivisor > 256) {          return false;      } +#endif  #if defined(K20x) || defined(KL2x)      spiConfig.tar0 = SPIx_CTARn_FMSZ(7) | SPIx_CTARn_ASC(1); @@ -135,6 +137,37 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {      }      spiConfig.cpr = (roundedDivisor - 1) >> 1; + +#elif defined(WB32F3G71xx) +    if (!lsbFirst) { +        osalDbgAssert(lsbFirst != FALSE, "unsupported lsbFirst"); +    } + +    if (divisor < 1) { +        return false; +    } + +    spiConfig.SPI_BaudRatePrescaler = (divisor << 2); + +    switch (mode) { +        case 0: +            spiConfig.SPI_CPHA = SPI_CPHA_1Edge; +            spiConfig.SPI_CPOL = SPI_CPOL_Low; +            break; +        case 1: +            spiConfig.SPI_CPHA = SPI_CPHA_2Edge; +            spiConfig.SPI_CPOL = SPI_CPOL_Low; +            break; +        case 2: +            spiConfig.SPI_CPHA = SPI_CPHA_1Edge; +            spiConfig.SPI_CPOL = SPI_CPOL_High; +            break; +        case 3: +            spiConfig.SPI_CPHA = SPI_CPHA_2Edge; +            spiConfig.SPI_CPOL = SPI_CPOL_High; +            break; +    } +  #else      spiConfig.cr1 = 0; diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c index 297c1892c3..d2ea5d6415 100644 --- a/platforms/chibios/drivers/uart.c +++ b/platforms/chibios/drivers/uart.c @@ -18,7 +18,11 @@  #include "quantum.h" +#if defined(WB32F3G71xx) +static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT}; +#else  static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; +#endif  void uart_init(uint32_t baud) {      static bool is_initialised = false; diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h index 5bc4875901..603d51037b 100644 --- a/platforms/chibios/drivers/uart.h +++ b/platforms/chibios/drivers/uart.h @@ -68,6 +68,22 @@  #    define SD1_CR3 0  #endif +#ifndef SD1_WRDLEN +#    define SD1_WRDLEN 3 +#endif + +#ifndef SD1_STPBIT +#    define SD1_STPBIT 0 +#endif + +#ifndef SD1_PARITY +#    define SD1_PARITY 0 +#endif + +#ifndef SD1_ATFLCT +#    define SD1_ATFLCT 0 +#endif +  void uart_init(uint32_t baud);  void uart_write(uint8_t data); diff --git a/platforms/chibios/flash.mk b/platforms/chibios/flash.mk index 31f69595da..6ee53172d2 100644 --- a/platforms/chibios/flash.mk +++ b/platforms/chibios/flash.mk @@ -23,6 +23,20 @@ define EXEC_DFU_UTIL  	$(DFU_UTIL) $(DFU_ARGS) -D $(BUILD_DIR)/$(TARGET).bin  endef + +define EXEC_WB32_DFU_UPDATER +	if ! wb32-dfu-updater_cli -l | grep -q "Found DFU"; then \ +		printf "$(MSG_BOOTLOADER_NOT_FOUND_QUICK_RETRY)" ;\ +		sleep $(BOOTLOADER_RETRY_TIME) ;\ +		while ! wb32-dfu-updater_cli -l | grep -q "Found DFU"; do \ +			printf "." ;\ +			sleep $(BOOTLOADER_RETRY_TIME) ;\ +		done ;\ +		printf "\n" ;\ +	fi +	wb32-dfu-updater_cli -D $(BUILD_DIR)/$(TARGET).bin +endef +  dfu-util: $(BUILD_DIR)/$(TARGET).bin cpfirmware sizeafter  	$(call EXEC_DFU_UTIL) @@ -82,6 +96,8 @@ else ifeq ($(strip $(MCU_FAMILY)),MIMXRT1062)  	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_TEENSY)  else ifeq ($(strip $(MCU_FAMILY)),STM32)  	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU_UTIL) +else ifeq ($(strip $(MCU_FAMILY)),WB32) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_WB32_DFU_UPDATER)  else ifeq ($(strip $(MCU_FAMILY)),GD32V)  	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU_UTIL)  else diff --git a/platforms/chibios/platform.mk b/platforms/chibios/platform.mk index 1c8d430074..45e3377882 100644 --- a/platforms/chibios/platform.mk +++ b/platforms/chibios/platform.mk @@ -141,6 +141,10 @@ ifdef STM32_BOOTLOADER_ADDRESS      OPT_DEFS += -DSTM32_BOOTLOADER_ADDRESS=$(STM32_BOOTLOADER_ADDRESS)  endif +ifdef WB32_BOOTLOADER_ADDRESS +    OPT_DEFS += -DWB32_BOOTLOADER_ADDRESS=$(WB32_BOOTLOADER_ADDRESS) +endif +  # Work out if we need to set up the include for the bootloader definitions  ifneq ("$(wildcard $(KEYBOARD_PATH_5)/bootloader_defs.h)","")      OPT_DEFS += -include $(KEYBOARD_PATH_5)/bootloader_defs.h | 
