diff options
Diffstat (limited to 'platforms')
116 files changed, 6805 insertions, 5 deletions
| diff --git a/platforms/arm_atsam/flash.mk b/platforms/arm_atsam/flash.mk new file mode 100644 index 0000000000..f31d4b4d95 --- /dev/null +++ b/platforms/arm_atsam/flash.mk @@ -0,0 +1,11 @@ +# Hey Emacs, this is a -*- makefile -*- +############################################################################## +# Architecture or project specific options +# + +flash: bin +ifneq ($(strip $(PROGRAM_CMD)),) +	$(UNSYNC_OUTPUT_CMD) && $(PROGRAM_CMD) +else +	$(PRINT_OK); $(SILENT) || printf "$(MSG_FLASH_ARCH)" +endif diff --git a/platforms/avr/drivers/analog.c b/platforms/avr/drivers/analog.c new file mode 100644 index 0000000000..8d299ffdb9 --- /dev/null +++ b/platforms/avr/drivers/analog.c @@ -0,0 +1,138 @@ +/* Copyright 2015 Jack Humbert + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#include <avr/io.h> +#include <avr/pgmspace.h> +#include <stdint.h> +#include "analog.h" + +static uint8_t aref = ADC_REF_POWER; + +void analogReference(uint8_t mode) { aref = mode & (_BV(REFS1) | _BV(REFS0)); } + +// Arduino compatible pin input +int16_t analogRead(uint8_t pin) { +#if defined(__AVR_ATmega32U4__) +    // clang-format off +    static const uint8_t PROGMEM pin_to_mux[] = { +        //A0    A1    A2    A3    A4    A5 +        //F7    F6    F5    F4    F1    F0 +        0x07, 0x06, 0x05, 0x04, 0x01, 0x00, +        //A6    A7    A8    A9   A10   A11 +        //D4    D7    B4    B5    B6    D6 +        0x20, 0x22, 0x23, 0x24, 0x25, 0x21 +    }; +    // clang-format on +    if (pin >= 12) return 0; +    return adc_read(pgm_read_byte(pin_to_mux + pin)); +#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328__) +    if (pin >= 8) return 0; +    return adc_read(pin); +#else +    return 0; +#endif +} + +int16_t analogReadPin(pin_t pin) { return adc_read(pinToMux(pin)); } + +uint8_t pinToMux(pin_t pin) { +    switch (pin) { +        // clang-format off +#if defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) +        case F0: return 0;  // ADC0 +        case F1: return _BV(MUX0);  // ADC1 +        case F2: return _BV(MUX1);  // ADC2 +        case F3: return _BV(MUX1) | _BV(MUX0);  // ADC3 +        case F4: return _BV(MUX2);  // ADC4 +        case F5: return _BV(MUX2) | _BV(MUX0);  // ADC5 +        case F6: return _BV(MUX2) | _BV(MUX1);  // ADC6 +        case F7: return _BV(MUX2) | _BV(MUX1) | _BV(MUX0);  // ADC7 +        default: return _BV(MUX4) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1) | _BV(MUX0);  // 0V +#elif defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) +        case F0: return 0;  // ADC0 +        case F1: return _BV(MUX0);  // ADC1 +        case F4: return _BV(MUX2);  // ADC4 +        case F5: return _BV(MUX2) | _BV(MUX0);  // ADC5 +        case F6: return _BV(MUX2) | _BV(MUX1);  // ADC6 +        case F7: return _BV(MUX2) | _BV(MUX1) | _BV(MUX0);  // ADC7 +        case D4: return _BV(MUX5);  // ADC8 +        case D6: return _BV(MUX5) | _BV(MUX0);  // ADC9 +        case D7: return _BV(MUX5) | _BV(MUX1);  // ADC10 +        case B4: return _BV(MUX5) | _BV(MUX1) | _BV(MUX0);  // ADC11 +        case B5: return _BV(MUX5) | _BV(MUX2);  // ADC12 +        case B6: return _BV(MUX5) | _BV(MUX2) | _BV(MUX0);  // ADC13 +        default: return _BV(MUX4) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1) | _BV(MUX0);  // 0V +#elif defined(__AVR_ATmega32A__) +        case A0: return 0;  // ADC0 +        case A1: return _BV(MUX0);  // ADC1 +        case A2: return _BV(MUX1);  // ADC2 +        case A3: return _BV(MUX1) | _BV(MUX0);  // ADC3 +        case A4: return _BV(MUX2);  // ADC4 +        case A5: return _BV(MUX2) | _BV(MUX0);  // ADC5 +        case A6: return _BV(MUX2) | _BV(MUX1);  // ADC6 +        case A7: return _BV(MUX2) | _BV(MUX1) | _BV(MUX0);  // ADC7 +        default: return _BV(MUX4) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1) | _BV(MUX0);  // 0V +#elif defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328__) +        case C0: return 0;  // ADC0 +        case C1: return _BV(MUX0);  // ADC1 +        case C2: return _BV(MUX1);  // ADC2 +        case C3: return _BV(MUX1) | _BV(MUX0);  // ADC3 +        case C4: return _BV(MUX2);  // ADC4 +        case C5: return _BV(MUX2) | _BV(MUX0);  // ADC5 +        // ADC7:6 not present in DIP package and not shared by GPIO pins +        default: return _BV(MUX3) | _BV(MUX2) | _BV(MUX1) | _BV(MUX0);  // 0V +#endif +            // clang-format on +    } +    return 0; +} + +int16_t adc_read(uint8_t mux) { +    uint16_t low; + +    // Enable ADC and configure prescaler +    ADCSRA = _BV(ADEN) | ADC_PRESCALER; + +#if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) +    // High speed mode and ADC8-13 +    ADCSRB = _BV(ADHSM) | (mux & _BV(MUX5)); +#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) +    // High speed mode only +    ADCSRB = _BV(ADHSM); +#endif + +    // Configure mux input +#if defined(MUX4) +    ADMUX = aref | (mux & (_BV(MUX4) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1) | _BV(MUX0))); +#else +    ADMUX  = aref | (mux & (_BV(MUX3) | _BV(MUX2) | _BV(MUX1) | _BV(MUX0))); +#endif + +    // Start the conversion +    ADCSRA |= _BV(ADSC); +    // Wait for result +    while (ADCSRA & _BV(ADSC)) +        ; +    // Must read LSB first +    low = ADCL; +    // Must read MSB only once! +    low |= (ADCH << 8); + +    // turn off the ADC +    ADCSRA &= ~(1 << ADEN); + +    return low; +} diff --git a/platforms/avr/drivers/analog.h b/platforms/avr/drivers/analog.h new file mode 100644 index 0000000000..058882450d --- /dev/null +++ b/platforms/avr/drivers/analog.h @@ -0,0 +1,53 @@ +/* Copyright 2015 Jack Humbert + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include "quantum.h" + +#ifdef __cplusplus +extern "C" { +#endif +void    analogReference(uint8_t mode); +int16_t analogRead(uint8_t pin); + +int16_t analogReadPin(pin_t pin); +uint8_t pinToMux(pin_t pin); + +int16_t adc_read(uint8_t mux); +#ifdef __cplusplus +} +#endif + +#define ADC_REF_EXTERNAL 0                          // AREF, Internal Vref turned off +#define ADC_REF_POWER _BV(REFS0)                    // AVCC with external capacitor on AREF pin +#define ADC_REF_INTERNAL (_BV(REFS1) | _BV(REFS0))  // Internal 2.56V Voltage Reference with external capacitor on AREF pin (1.1V for 328P) + +// These prescaler values are for high speed mode, ADHSM = 1 +#if F_CPU == 16000000L || F_CPU == 12000000L +#    define ADC_PRESCALER (_BV(ADPS2) | _BV(ADPS1))  // /64 +#elif F_CPU == 8000000L +#    define ADC_PRESCALER (_BV(ADPS2) | _BV(ADPS0))  // /32 +#elif F_CPU == 4000000L +#    define ADC_PRESCALER (_BV(ADPS2))  // /16 +#elif F_CPU == 2000000L +#    define ADC_PRESCALER (_BV(ADPS1) | _BV(ADPS0))  // /8 +#elif F_CPU == 1000000L +#    define ADC_PRESCALER _BV(ADPS1)  // /4 +#else +#    define ADC_PRESCALER _BV(ADPS0)  // /2 +#endif diff --git a/platforms/avr/drivers/glcdfont.c b/platforms/avr/drivers/glcdfont.c new file mode 100644 index 0000000000..5e763b054f --- /dev/null +++ b/platforms/avr/drivers/glcdfont.c @@ -0,0 +1,23 @@ +// This is the 'classic' fixed-space bitmap font for Adafruit_GFX since 1.0. +// See gfxfont.h for newer custom bitmap font info. + +#include "progmem.h" + +// Standard ASCII 5x7 font + +static const unsigned char font[] PROGMEM = { +    0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x5B, 0x4F, 0x5B, 0x3E, 0x3E, 0x6B, 0x4F, 0x6B, 0x3E, 0x1C, 0x3E, 0x7C, 0x3E, 0x1C, 0x18, 0x3C, 0x7E, 0x3C, 0x18, 0x1C, 0x57, 0x7D, 0x57, 0x1C, 0x1C, 0x5E, 0x7F, 0x5E, 0x1C, 0x00, 0x18, 0x3C, 0x18, 0x00, 0xFF, 0xE7, 0xC3, 0xE7, 0xFF, 0x00, 0x18, 0x24, 0x18, 0x00, 0xFF, 0xE7, 0xDB, 0xE7, 0xFF, 0x30, 0x48, 0x3A, 0x06, 0x0E, 0x26, 0x29, 0x79, 0x29, 0x26, 0x40, 0x7F, 0x05, 0x05, 0x07, 0x40, 0x7F, 0x05, 0x25, 0x3F, 0x5A, 0x3C, 0xE7, 0x3C, 0x5A, 0x7F, 0x3E, 0x1C, 0x1C, 0x08, 0x08, 0x1C, 0x1C, 0x3E, 0x7F, 0x14, 0x22, 0x7F, 0x22, 0x14, 0x5F, 0x5F, 0x00, 0x5F, 0x5F, 0x06, 0x09, 0x7F, 0x01, 0x7F, 0x00, 0x66, 0x89, 0x95, 0x6A, 0x60, 0x60, 0x60, 0x60, 0x60, 0x94, 0xA2, 0xFF, 0xA2, 0x94, 0x08, 0x04, 0x7E, 0x04, 0x08, 0x10, 0x20, 0x7E, 0x20, 0x10, 0x08, 0x08, 0x2A, 0x1C, 0x08, 0x08, 0x1C, 0x2A, 0x08, 0x08, 0x1E, 0x10, 0x10, 0x10, 0x10, 0x0C, 0x1E, 0x0C, 0x1E, 0x0C, +    0x30, 0x38, 0x3E, 0x38, 0x30, 0x06, 0x0E, 0x3E, 0x0E, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x00, 0x07, 0x00, 0x07, 0x00, 0x14, 0x7F, 0x14, 0x7F, 0x14, 0x24, 0x2A, 0x7F, 0x2A, 0x12, 0x23, 0x13, 0x08, 0x64, 0x62, 0x36, 0x49, 0x56, 0x20, 0x50, 0x00, 0x08, 0x07, 0x03, 0x00, 0x00, 0x1C, 0x22, 0x41, 0x00, 0x00, 0x41, 0x22, 0x1C, 0x00, 0x2A, 0x1C, 0x7F, 0x1C, 0x2A, 0x08, 0x08, 0x3E, 0x08, 0x08, 0x00, 0x80, 0x70, 0x30, 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x60, 0x60, 0x00, 0x20, 0x10, 0x08, 0x04, 0x02, 0x3E, 0x51, 0x49, 0x45, 0x3E, 0x00, 0x42, 0x7F, 0x40, 0x00, 0x72, 0x49, 0x49, 0x49, 0x46, 0x21, 0x41, 0x49, 0x4D, 0x33, 0x18, 0x14, 0x12, 0x7F, 0x10, 0x27, 0x45, 0x45, 0x45, 0x39, 0x3C, 0x4A, 0x49, 0x49, 0x31, 0x41, 0x21, 0x11, 0x09, 0x07, 0x36, 0x49, 0x49, 0x49, 0x36, 0x46, 0x49, 0x49, 0x29, 0x1E, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x40, 0x34, 0x00, 0x00, +    0x00, 0x08, 0x14, 0x22, 0x41, 0x14, 0x14, 0x14, 0x14, 0x14, 0x00, 0x41, 0x22, 0x14, 0x08, 0x02, 0x01, 0x59, 0x09, 0x06, 0x3E, 0x41, 0x5D, 0x59, 0x4E, 0x7C, 0x12, 0x11, 0x12, 0x7C, 0x7F, 0x49, 0x49, 0x49, 0x36, 0x3E, 0x41, 0x41, 0x41, 0x22, 0x7F, 0x41, 0x41, 0x41, 0x3E, 0x7F, 0x49, 0x49, 0x49, 0x41, 0x7F, 0x09, 0x09, 0x09, 0x01, 0x3E, 0x41, 0x41, 0x51, 0x73, 0x7F, 0x08, 0x08, 0x08, 0x7F, 0x00, 0x41, 0x7F, 0x41, 0x00, 0x20, 0x40, 0x41, 0x3F, 0x01, 0x7F, 0x08, 0x14, 0x22, 0x41, 0x7F, 0x40, 0x40, 0x40, 0x40, 0x7F, 0x02, 0x1C, 0x02, 0x7F, 0x7F, 0x04, 0x08, 0x10, 0x7F, 0x3E, 0x41, 0x41, 0x41, 0x3E, 0x7F, 0x09, 0x09, 0x09, 0x06, 0x3E, 0x41, 0x51, 0x21, 0x5E, 0x7F, 0x09, 0x19, 0x29, 0x46, 0x26, 0x49, 0x49, 0x49, 0x32, 0x03, 0x01, 0x7F, 0x01, 0x03, 0x3F, 0x40, 0x40, 0x40, 0x3F, 0x1F, 0x20, 0x40, 0x20, 0x1F, 0x3F, 0x40, 0x38, 0x40, 0x3F, 0x63, 0x14, 0x08, 0x14, 0x63, 0x03, 0x04, 0x78, 0x04, 0x03, +    0x61, 0x59, 0x49, 0x4D, 0x43, 0x00, 0x7F, 0x41, 0x41, 0x41, 0x02, 0x04, 0x08, 0x10, 0x20, 0x00, 0x41, 0x41, 0x41, 0x7F, 0x04, 0x02, 0x01, 0x02, 0x04, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x03, 0x07, 0x08, 0x00, 0x20, 0x54, 0x54, 0x78, 0x40, 0x7F, 0x28, 0x44, 0x44, 0x38, 0x38, 0x44, 0x44, 0x44, 0x28, 0x38, 0x44, 0x44, 0x28, 0x7F, 0x38, 0x54, 0x54, 0x54, 0x18, 0x00, 0x08, 0x7E, 0x09, 0x02, 0x18, 0xA4, 0xA4, 0x9C, 0x78, 0x7F, 0x08, 0x04, 0x04, 0x78, 0x00, 0x44, 0x7D, 0x40, 0x00, 0x20, 0x40, 0x40, 0x3D, 0x00, 0x7F, 0x10, 0x28, 0x44, 0x00, 0x00, 0x41, 0x7F, 0x40, 0x00, 0x7C, 0x04, 0x78, 0x04, 0x78, 0x7C, 0x08, 0x04, 0x04, 0x78, 0x38, 0x44, 0x44, 0x44, 0x38, 0xFC, 0x18, 0x24, 0x24, 0x18, 0x18, 0x24, 0x24, 0x18, 0xFC, 0x7C, 0x08, 0x04, 0x04, 0x08, 0x48, 0x54, 0x54, 0x54, 0x24, 0x04, 0x04, 0x3F, 0x44, 0x24, 0x3C, 0x40, 0x40, 0x20, 0x7C, 0x1C, 0x20, 0x40, 0x20, 0x1C, 0x3C, 0x40, 0x30, 0x40, 0x3C, +    0x44, 0x28, 0x10, 0x28, 0x44, 0x4C, 0x90, 0x90, 0x90, 0x7C, 0x44, 0x64, 0x54, 0x4C, 0x44, 0x00, 0x08, 0x36, 0x41, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x41, 0x36, 0x08, 0x00, 0x02, 0x01, 0x02, 0x04, 0x02, 0x3C, 0x26, 0x23, 0x26, 0x3C, 0x1E, 0xA1, 0xA1, 0x61, 0x12, 0x3A, 0x40, 0x40, 0x20, 0x7A, 0x38, 0x54, 0x54, 0x55, 0x59, 0x21, 0x55, 0x55, 0x79, 0x41, 0x22, 0x54, 0x54, 0x78, 0x42,                                                                                                                                                                                                                                                                                                              // a-umlaut +    0x21, 0x55, 0x54, 0x78, 0x40, 0x20, 0x54, 0x55, 0x79, 0x40, 0x0C, 0x1E, 0x52, 0x72, 0x12, 0x39, 0x55, 0x55, 0x55, 0x59, 0x39, 0x54, 0x54, 0x54, 0x59, 0x39, 0x55, 0x54, 0x54, 0x58, 0x00, 0x00, 0x45, 0x7C, 0x41, 0x00, 0x02, 0x45, 0x7D, 0x42, 0x00, 0x01, 0x45, 0x7C, 0x40, 0x7D, 0x12, 0x11, 0x12, 0x7D,                                                                                                                                                                                                                                                                                                                                                                                                        // A-umlaut +    0xF0, 0x28, 0x25, 0x28, 0xF0, 0x7C, 0x54, 0x55, 0x45, 0x00, 0x20, 0x54, 0x54, 0x7C, 0x54, 0x7C, 0x0A, 0x09, 0x7F, 0x49, 0x32, 0x49, 0x49, 0x49, 0x32, 0x3A, 0x44, 0x44, 0x44, 0x3A,                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                // o-umlaut +    0x32, 0x4A, 0x48, 0x48, 0x30, 0x3A, 0x41, 0x41, 0x21, 0x7A, 0x3A, 0x42, 0x40, 0x20, 0x78, 0x00, 0x9D, 0xA0, 0xA0, 0x7D, 0x3D, 0x42, 0x42, 0x42, 0x3D,                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              // O-umlaut +    0x3D, 0x40, 0x40, 0x40, 0x3D, 0x3C, 0x24, 0xFF, 0x24, 0x24, 0x48, 0x7E, 0x49, 0x43, 0x66, 0x2B, 0x2F, 0xFC, 0x2F, 0x2B, 0xFF, 0x09, 0x29, 0xF6, 0x20, 0xC0, 0x88, 0x7E, 0x09, 0x03, 0x20, 0x54, 0x54, 0x79, 0x41, 0x00, 0x00, 0x44, 0x7D, 0x41, 0x30, 0x48, 0x48, 0x4A, 0x32, 0x38, 0x40, 0x40, 0x22, 0x7A, 0x00, 0x7A, 0x0A, 0x0A, 0x72, 0x7D, 0x0D, 0x19, 0x31, 0x7D, 0x26, 0x29, 0x29, 0x2F, 0x28, 0x26, 0x29, 0x29, 0x29, 0x26, 0x30, 0x48, 0x4D, 0x40, 0x20, 0x38, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x38, 0x2F, 0x10, 0xC8, 0xAC, 0xBA, 0x2F, 0x10, 0x28, 0x34, 0xFA, 0x00, 0x00, 0x7B, 0x00, 0x00, 0x08, 0x14, 0x2A, 0x14, 0x22, 0x22, 0x14, 0x2A, 0x14, 0x08, 0x55, 0x00, 0x55, 0x00, 0x55,  // #176 (25% block) missing in old code +    0xAA, 0x55, 0xAA, 0x55, 0xAA,                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      // 50% block +    0xFF, 0x55, 0xFF, 0x55, 0xFF,                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      // 75% block +    0x00, 0x00, 0x00, 0xFF, 0x00, 0x10, 0x10, 0x10, 0xFF, 0x00, 0x14, 0x14, 0x14, 0xFF, 0x00, 0x10, 0x10, 0xFF, 0x00, 0xFF, 0x10, 0x10, 0xF0, 0x10, 0xF0, 0x14, 0x14, 0x14, 0xFC, 0x00, 0x14, 0x14, 0xF7, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x14, 0x14, 0xF4, 0x04, 0xFC, 0x14, 0x14, 0x17, 0x10, 0x1F, 0x10, 0x10, 0x1F, 0x10, 0x1F, 0x14, 0x14, 0x14, 0x1F, 0x00, 0x10, 0x10, 0x10, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x10, 0x10, 0x10, 0x10, 0x1F, 0x10, 0x10, 0x10, 0x10, 0xF0, 0x10, 0x00, 0x00, 0x00, 0xFF, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0xFF, 0x10, 0x00, 0x00, 0x00, 0xFF, 0x14, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0x1F, 0x10, 0x17, 0x00, 0x00, 0xFC, 0x04, 0xF4, 0x14, 0x14, 0x17, 0x10, 0x17, 0x14, 0x14, 0xF4, 0x04, 0xF4, 0x00, 0x00, 0xFF, 0x00, 0xF7, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0xF7, 0x00, 0xF7, 0x14, 0x14, 0x14, 0x17, 0x14, 0x10, 0x10, 0x1F, 0x10, 0x1F, +    0x14, 0x14, 0x14, 0xF4, 0x14, 0x10, 0x10, 0xF0, 0x10, 0xF0, 0x00, 0x00, 0x1F, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x1F, 0x14, 0x00, 0x00, 0x00, 0xFC, 0x14, 0x00, 0x00, 0xF0, 0x10, 0xF0, 0x10, 0x10, 0xFF, 0x10, 0xFF, 0x14, 0x14, 0x14, 0xFF, 0x14, 0x10, 0x10, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x38, 0x44, 0x44, 0x38, 0x44, 0xFC, 0x4A, 0x4A, 0x4A, 0x34,                                                                                                                                                                                                                                                                                                                                                                                                       // sharp-s or beta +    0x7E, 0x02, 0x02, 0x06, 0x06, 0x02, 0x7E, 0x02, 0x7E, 0x02, 0x63, 0x55, 0x49, 0x41, 0x63, 0x38, 0x44, 0x44, 0x3C, 0x04, 0x40, 0x7E, 0x20, 0x1E, 0x20, 0x06, 0x02, 0x7E, 0x02, 0x02, 0x99, 0xA5, 0xE7, 0xA5, 0x99, 0x1C, 0x2A, 0x49, 0x2A, 0x1C, 0x4C, 0x72, 0x01, 0x72, 0x4C, 0x30, 0x4A, 0x4D, 0x4D, 0x30, 0x30, 0x48, 0x78, 0x48, 0x30, 0xBC, 0x62, 0x5A, 0x46, 0x3D, 0x3E, 0x49, 0x49, 0x49, 0x00, 0x7E, 0x01, 0x01, 0x01, 0x7E, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x44, 0x44, 0x5F, 0x44, 0x44, 0x40, 0x51, 0x4A, 0x44, 0x40, 0x40, 0x44, 0x4A, 0x51, 0x40, 0x00, 0x00, 0xFF, 0x01, 0x03, 0xE0, 0x80, 0xFF, 0x00, 0x00, 0x08, 0x08, 0x6B, 0x6B, 0x08, 0x36, 0x12, 0x36, 0x24, 0x36, 0x06, 0x0F, 0x09, 0x0F, 0x06, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x10, 0x10, 0x00, 0x30, 0x40, 0xFF, 0x01, 0x01, 0x00, 0x1F, 0x01, 0x01, 0x1E, 0x00, 0x19, 0x1D, 0x17, 0x12, 0x00, 0x3C, 0x3C, 0x3C, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00  // #255 NBSP +}; diff --git a/platforms/avr/drivers/hd44780.c b/platforms/avr/drivers/hd44780.c new file mode 100644 index 0000000000..f71069dece --- /dev/null +++ b/platforms/avr/drivers/hd44780.c @@ -0,0 +1,536 @@ +/**************************************************************************** + Title:     HD44780U LCD library + Author:    Peter Fleury <[email protected]>  http://tinyurl.com/peterfleury + License:   GNU General Public License Version 3 + File:	    $Id: lcd.c,v 1.15.2.2 2015/01/17 12:16:05 peter Exp $ + Software:  AVR-GCC 3.3 + Target:    any AVR device, memory mapped mode only for AT90S4414/8515/Mega + + DESCRIPTION +       Basic routines for interfacing a HD44780U-based text lcd display + +       Originally based on Volker Oth's lcd library, +       changed lcd_init(), added additional constants for lcd_command(), +       added 4-bit I/O mode, improved and optimized code. + +       Library can be operated in memory mapped mode (LCD_IO_MODE=0) or in +       4-bit IO port mode (LCD_IO_MODE=1). 8-bit IO port mode not supported. + +       Memory mapped mode compatible with Kanda STK200, but supports also +       generation of R/W signal through A8 address line. + + USAGE +       See the C include lcd.h file for a description of each function + +*****************************************************************************/ +#include <inttypes.h> +#include <avr/io.h> +#include <avr/pgmspace.h> +#include <util/delay.h> +#include "hd44780.h" + +/* +** constants/macros +*/ +#define DDR(x) (*(&x - 1)) /* address of data direction register of port x */ +#if defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__) +/* on ATmega64/128 PINF is on port 0x00 and not 0x60 */ +#    define PIN(x) (&PORTF == &(x) ? _SFR_IO8(0x00) : (*(&x - 2))) +#else +#    define PIN(x) (*(&x - 2)) /* address of input register of port x          */ +#endif + +#if LCD_IO_MODE +#    define lcd_e_delay() _delay_us(LCD_DELAY_ENABLE_PULSE) +#    define lcd_e_high() LCD_E_PORT |= _BV(LCD_E_PIN); +#    define lcd_e_low() LCD_E_PORT &= ~_BV(LCD_E_PIN); +#    define lcd_e_toggle() toggle_e() +#    define lcd_rw_high() LCD_RW_PORT |= _BV(LCD_RW_PIN) +#    define lcd_rw_low() LCD_RW_PORT &= ~_BV(LCD_RW_PIN) +#    define lcd_rs_high() LCD_RS_PORT |= _BV(LCD_RS_PIN) +#    define lcd_rs_low() LCD_RS_PORT &= ~_BV(LCD_RS_PIN) +#endif + +#if LCD_IO_MODE +#    if LCD_LINES == 1 +#        define LCD_FUNCTION_DEFAULT LCD_FUNCTION_4BIT_1LINE +#    else +#        define LCD_FUNCTION_DEFAULT LCD_FUNCTION_4BIT_2LINES +#    endif +#else +#    if LCD_LINES == 1 +#        define LCD_FUNCTION_DEFAULT LCD_FUNCTION_8BIT_1LINE +#    else +#        define LCD_FUNCTION_DEFAULT LCD_FUNCTION_8BIT_2LINES +#    endif +#endif + +#if LCD_CONTROLLER_KS0073 +#    if LCD_LINES == 4 + +#        define KS0073_EXTENDED_FUNCTION_REGISTER_ON 0x2C  /* |0|010|1100 4-bit mode, extension-bit RE = 1 */ +#        define KS0073_EXTENDED_FUNCTION_REGISTER_OFF 0x28 /* |0|010|1000 4-bit mode, extension-bit RE = 0 */ +#        define KS0073_4LINES_MODE 0x09                    /* |0|000|1001 4 lines mode */ + +#    endif +#endif + +/* +** function prototypes +*/ +#if LCD_IO_MODE +static void toggle_e(void); +#endif + +/* +** local functions +*/ + +/************************************************************************* +delay for a minimum of <us> microseconds +the number of loops is calculated at compile-time from MCU clock frequency +*************************************************************************/ +#define delay(us) _delay_us(us) + +#if LCD_IO_MODE +/* toggle Enable Pin to initiate write */ +static void toggle_e(void) { +    lcd_e_high(); +    lcd_e_delay(); +    lcd_e_low(); +} +#endif + +/************************************************************************* +Low-level function to write byte to LCD controller +Input:    data   byte to write to LCD +          rs     1: write data +                 0: write instruction +Returns:  none +*************************************************************************/ +#if LCD_IO_MODE +static void lcd_write(uint8_t data, uint8_t rs) { +    unsigned char dataBits; + +    if (rs) { /* write data        (RS=1, RW=0) */ +        lcd_rs_high(); +    } else { /* write instruction (RS=0, RW=0) */ +        lcd_rs_low(); +    } +    lcd_rw_low(); /* RW=0  write mode      */ + +    if ((&LCD_DATA0_PORT == &LCD_DATA1_PORT) && (&LCD_DATA1_PORT == &LCD_DATA2_PORT) && (&LCD_DATA2_PORT == &LCD_DATA3_PORT) && (LCD_DATA0_PIN == 0) && (LCD_DATA1_PIN == 1) && (LCD_DATA2_PIN == 2) && (LCD_DATA3_PIN == 3)) { +        /* configure data pins as output */ +        DDR(LCD_DATA0_PORT) |= 0x0F; + +        /* output high nibble first */ +        dataBits       = LCD_DATA0_PORT & 0xF0; +        LCD_DATA0_PORT = dataBits | ((data >> 4) & 0x0F); +        lcd_e_toggle(); + +        /* output low nibble */ +        LCD_DATA0_PORT = dataBits | (data & 0x0F); +        lcd_e_toggle(); + +        /* all data pins high (inactive) */ +        LCD_DATA0_PORT = dataBits | 0x0F; +    } else { +        /* configure data pins as output */ +        DDR(LCD_DATA0_PORT) |= _BV(LCD_DATA0_PIN); +        DDR(LCD_DATA1_PORT) |= _BV(LCD_DATA1_PIN); +        DDR(LCD_DATA2_PORT) |= _BV(LCD_DATA2_PIN); +        DDR(LCD_DATA3_PORT) |= _BV(LCD_DATA3_PIN); + +        /* output high nibble first */ +        LCD_DATA3_PORT &= ~_BV(LCD_DATA3_PIN); +        LCD_DATA2_PORT &= ~_BV(LCD_DATA2_PIN); +        LCD_DATA1_PORT &= ~_BV(LCD_DATA1_PIN); +        LCD_DATA0_PORT &= ~_BV(LCD_DATA0_PIN); +        if (data & 0x80) LCD_DATA3_PORT |= _BV(LCD_DATA3_PIN); +        if (data & 0x40) LCD_DATA2_PORT |= _BV(LCD_DATA2_PIN); +        if (data & 0x20) LCD_DATA1_PORT |= _BV(LCD_DATA1_PIN); +        if (data & 0x10) LCD_DATA0_PORT |= _BV(LCD_DATA0_PIN); +        lcd_e_toggle(); + +        /* output low nibble */ +        LCD_DATA3_PORT &= ~_BV(LCD_DATA3_PIN); +        LCD_DATA2_PORT &= ~_BV(LCD_DATA2_PIN); +        LCD_DATA1_PORT &= ~_BV(LCD_DATA1_PIN); +        LCD_DATA0_PORT &= ~_BV(LCD_DATA0_PIN); +        if (data & 0x08) LCD_DATA3_PORT |= _BV(LCD_DATA3_PIN); +        if (data & 0x04) LCD_DATA2_PORT |= _BV(LCD_DATA2_PIN); +        if (data & 0x02) LCD_DATA1_PORT |= _BV(LCD_DATA1_PIN); +        if (data & 0x01) LCD_DATA0_PORT |= _BV(LCD_DATA0_PIN); +        lcd_e_toggle(); + +        /* all data pins high (inactive) */ +        LCD_DATA0_PORT |= _BV(LCD_DATA0_PIN); +        LCD_DATA1_PORT |= _BV(LCD_DATA1_PIN); +        LCD_DATA2_PORT |= _BV(LCD_DATA2_PIN); +        LCD_DATA3_PORT |= _BV(LCD_DATA3_PIN); +    } +} +#else +#    define lcd_write(d, rs)                        \ +        if (rs)                                     \ +            *(volatile uint8_t *)(LCD_IO_DATA) = d; \ +        else                                        \ +            *(volatile uint8_t *)(LCD_IO_FUNCTION) = d; +/* rs==0 -> write instruction to LCD_IO_FUNCTION */ +/* rs==1 -> write data to LCD_IO_DATA */ +#endif + +/************************************************************************* +Low-level function to read byte from LCD controller +Input:    rs     1: read data +                 0: read busy flag / address counter +Returns:  byte read from LCD controller +*************************************************************************/ +#if LCD_IO_MODE +static uint8_t lcd_read(uint8_t rs) { +    uint8_t data; + +    if (rs) +        lcd_rs_high(); /* RS=1: read data      */ +    else +        lcd_rs_low(); /* RS=0: read busy flag */ +    lcd_rw_high();    /* RW=1  read mode      */ + +    if ((&LCD_DATA0_PORT == &LCD_DATA1_PORT) && (&LCD_DATA1_PORT == &LCD_DATA2_PORT) && (&LCD_DATA2_PORT == &LCD_DATA3_PORT) && (LCD_DATA0_PIN == 0) && (LCD_DATA1_PIN == 1) && (LCD_DATA2_PIN == 2) && (LCD_DATA3_PIN == 3)) { +        DDR(LCD_DATA0_PORT) &= 0xF0; /* configure data pins as input */ + +        lcd_e_high(); +        lcd_e_delay(); +        data = PIN(LCD_DATA0_PORT) << 4; /* read high nibble first */ +        lcd_e_low(); + +        lcd_e_delay(); /* Enable 500ns low       */ + +        lcd_e_high(); +        lcd_e_delay(); +        data |= PIN(LCD_DATA0_PORT) & 0x0F; /* read low nibble        */ +        lcd_e_low(); +    } else { +        /* configure data pins as input */ +        DDR(LCD_DATA0_PORT) &= ~_BV(LCD_DATA0_PIN); +        DDR(LCD_DATA1_PORT) &= ~_BV(LCD_DATA1_PIN); +        DDR(LCD_DATA2_PORT) &= ~_BV(LCD_DATA2_PIN); +        DDR(LCD_DATA3_PORT) &= ~_BV(LCD_DATA3_PIN); + +        /* read high nibble first */ +        lcd_e_high(); +        lcd_e_delay(); +        data = 0; +        if (PIN(LCD_DATA0_PORT) & _BV(LCD_DATA0_PIN)) data |= 0x10; +        if (PIN(LCD_DATA1_PORT) & _BV(LCD_DATA1_PIN)) data |= 0x20; +        if (PIN(LCD_DATA2_PORT) & _BV(LCD_DATA2_PIN)) data |= 0x40; +        if (PIN(LCD_DATA3_PORT) & _BV(LCD_DATA3_PIN)) data |= 0x80; +        lcd_e_low(); + +        lcd_e_delay(); /* Enable 500ns low       */ + +        /* read low nibble */ +        lcd_e_high(); +        lcd_e_delay(); +        if (PIN(LCD_DATA0_PORT) & _BV(LCD_DATA0_PIN)) data |= 0x01; +        if (PIN(LCD_DATA1_PORT) & _BV(LCD_DATA1_PIN)) data |= 0x02; +        if (PIN(LCD_DATA2_PORT) & _BV(LCD_DATA2_PIN)) data |= 0x04; +        if (PIN(LCD_DATA3_PORT) & _BV(LCD_DATA3_PIN)) data |= 0x08; +        lcd_e_low(); +    } +    return data; +} +#else +#    define lcd_read(rs) (rs) ? *(volatile uint8_t *)(LCD_IO_DATA + LCD_IO_READ) : *(volatile uint8_t *)(LCD_IO_FUNCTION + LCD_IO_READ) +/* rs==0 -> read instruction from LCD_IO_FUNCTION */ +/* rs==1 -> read data from LCD_IO_DATA */ +#endif + +/************************************************************************* +loops while lcd is busy, returns address counter +*************************************************************************/ +static uint8_t lcd_waitbusy(void) + +{ +    register uint8_t c; + +    /* wait until busy flag is cleared */ +    while ((c = lcd_read(0)) & (1 << LCD_BUSY)) { +    } + +    /* the address counter is updated 4us after the busy flag is cleared */ +    delay(LCD_DELAY_BUSY_FLAG); + +    /* now read the address counter */ +    return (lcd_read(0));  // return address counter + +} /* lcd_waitbusy */ + +/************************************************************************* +Move cursor to the start of next line or to the first line if the cursor +is already on the last line. +*************************************************************************/ +static inline void lcd_newline(uint8_t pos) { +    register uint8_t addressCounter; + +#if LCD_LINES == 1 +    addressCounter = 0; +#endif +#if LCD_LINES == 2 +    if (pos < (LCD_START_LINE2)) +        addressCounter = LCD_START_LINE2; +    else +        addressCounter = LCD_START_LINE1; +#endif +#if LCD_LINES == 4 +#    if KS0073_4LINES_MODE +    if (pos < LCD_START_LINE2) +        addressCounter = LCD_START_LINE2; +    else if ((pos >= LCD_START_LINE2) && (pos < LCD_START_LINE3)) +        addressCounter = LCD_START_LINE3; +    else if ((pos >= LCD_START_LINE3) && (pos < LCD_START_LINE4)) +        addressCounter = LCD_START_LINE4; +    else +        addressCounter = LCD_START_LINE1; +#    else +    if (pos < LCD_START_LINE3) +        addressCounter = LCD_START_LINE2; +    else if ((pos >= LCD_START_LINE2) && (pos < LCD_START_LINE4)) +        addressCounter = LCD_START_LINE3; +    else if ((pos >= LCD_START_LINE3) && (pos < LCD_START_LINE2)) +        addressCounter = LCD_START_LINE4; +    else +        addressCounter = LCD_START_LINE1; +#    endif +#endif +    lcd_command((1 << LCD_DDRAM) + addressCounter); + +} /* lcd_newline */ + +/* +** PUBLIC FUNCTIONS +*/ + +/************************************************************************* +Send LCD controller instruction command +Input:   instruction to send to LCD controller, see HD44780 data sheet +Returns: none +*************************************************************************/ +void lcd_command(uint8_t cmd) { +    lcd_waitbusy(); +    lcd_write(cmd, 0); +} + +/************************************************************************* +Send data byte to LCD controller +Input:   data to send to LCD controller, see HD44780 data sheet +Returns: none +*************************************************************************/ +void lcd_data(uint8_t data) { +    lcd_waitbusy(); +    lcd_write(data, 1); +} + +/************************************************************************* +Set cursor to specified position +Input:    x  horizontal position  (0: left most position) +          y  vertical position    (0: first line) +Returns:  none +*************************************************************************/ +void lcd_gotoxy(uint8_t x, uint8_t y) { +#if LCD_LINES == 1 +    lcd_command((1 << LCD_DDRAM) + LCD_START_LINE1 + x); +#endif +#if LCD_LINES == 2 +    if (y == 0) +        lcd_command((1 << LCD_DDRAM) + LCD_START_LINE1 + x); +    else +        lcd_command((1 << LCD_DDRAM) + LCD_START_LINE2 + x); +#endif +#if LCD_LINES == 4 +    if (y == 0) +        lcd_command((1 << LCD_DDRAM) + LCD_START_LINE1 + x); +    else if (y == 1) +        lcd_command((1 << LCD_DDRAM) + LCD_START_LINE2 + x); +    else if (y == 2) +        lcd_command((1 << LCD_DDRAM) + LCD_START_LINE3 + x); +    else /* y==3 */ +        lcd_command((1 << LCD_DDRAM) + LCD_START_LINE4 + x); +#endif + +} /* lcd_gotoxy */ + +/************************************************************************* +*************************************************************************/ +int lcd_getxy(void) { return lcd_waitbusy(); } + +/************************************************************************* +Clear display and set cursor to home position +*************************************************************************/ +void lcd_clrscr(void) { lcd_command(1 << LCD_CLR); } + +/************************************************************************* +Set cursor to home position +*************************************************************************/ +void lcd_home(void) { lcd_command(1 << LCD_HOME); } + +/************************************************************************* +Display character at current cursor position +Input:    character to be displayed +Returns:  none +*************************************************************************/ +void lcd_putc(char c) { +    uint8_t pos; + +    pos = lcd_waitbusy();  // read busy-flag and address counter +    if (c == '\n') { +        lcd_newline(pos); +    } else { +#if LCD_WRAP_LINES == 1 +#    if LCD_LINES == 1 +        if (pos == LCD_START_LINE1 + LCD_DISP_LENGTH) { +            lcd_write((1 << LCD_DDRAM) + LCD_START_LINE1, 0); +        } +#    elif LCD_LINES == 2 +        if (pos == LCD_START_LINE1 + LCD_DISP_LENGTH) { +            lcd_write((1 << LCD_DDRAM) + LCD_START_LINE2, 0); +        } else if (pos == LCD_START_LINE2 + LCD_DISP_LENGTH) { +            lcd_write((1 << LCD_DDRAM) + LCD_START_LINE1, 0); +        } +#    elif LCD_LINES == 4 +        if (pos == LCD_START_LINE1 + LCD_DISP_LENGTH) { +            lcd_write((1 << LCD_DDRAM) + LCD_START_LINE2, 0); +        } else if (pos == LCD_START_LINE2 + LCD_DISP_LENGTH) { +            lcd_write((1 << LCD_DDRAM) + LCD_START_LINE3, 0); +        } else if (pos == LCD_START_LINE3 + LCD_DISP_LENGTH) { +            lcd_write((1 << LCD_DDRAM) + LCD_START_LINE4, 0); +        } else if (pos == LCD_START_LINE4 + LCD_DISP_LENGTH) { +            lcd_write((1 << LCD_DDRAM) + LCD_START_LINE1, 0); +        } +#    endif +        lcd_waitbusy(); +#endif +        lcd_write(c, 1); +    } + +} /* lcd_putc */ + +/************************************************************************* +Display string without auto linefeed +Input:    string to be displayed +Returns:  none +*************************************************************************/ +void lcd_puts(const char *s) +/* print string on lcd (no auto linefeed) */ +{ +    register char c; + +    while ((c = *s++)) { +        lcd_putc(c); +    } + +} /* lcd_puts */ + +/************************************************************************* +Display string from program memory without auto linefeed +Input:     string from program memory be be displayed +Returns:   none +*************************************************************************/ +void lcd_puts_p(const char *progmem_s) +/* print string from program memory on lcd (no auto linefeed) */ +{ +    register char c; + +    while ((c = pgm_read_byte(progmem_s++))) { +        lcd_putc(c); +    } + +} /* lcd_puts_p */ + +/************************************************************************* +Initialize display and select type of cursor +Input:    dispAttr LCD_DISP_OFF            display off +                   LCD_DISP_ON             display on, cursor off +                   LCD_DISP_ON_CURSOR      display on, cursor on +                   LCD_DISP_CURSOR_BLINK   display on, cursor on flashing +Returns:  none +*************************************************************************/ +void lcd_init(uint8_t dispAttr) { +#if LCD_IO_MODE +    /* +     *  Initialize LCD to 4 bit I/O mode +     */ + +    if ((&LCD_DATA0_PORT == &LCD_DATA1_PORT) && (&LCD_DATA1_PORT == &LCD_DATA2_PORT) && (&LCD_DATA2_PORT == &LCD_DATA3_PORT) && (&LCD_RS_PORT == &LCD_DATA0_PORT) && (&LCD_RW_PORT == &LCD_DATA0_PORT) && (&LCD_E_PORT == &LCD_DATA0_PORT) && (LCD_DATA0_PIN == 0) && (LCD_DATA1_PIN == 1) && (LCD_DATA2_PIN == 2) && (LCD_DATA3_PIN == 3) && (LCD_RS_PIN == 4) && (LCD_RW_PIN == 5) && (LCD_E_PIN == 6)) { +        /* configure all port bits as output (all LCD lines on same port) */ +        DDR(LCD_DATA0_PORT) |= 0x7F; +    } else if ((&LCD_DATA0_PORT == &LCD_DATA1_PORT) && (&LCD_DATA1_PORT == &LCD_DATA2_PORT) && (&LCD_DATA2_PORT == &LCD_DATA3_PORT) && (LCD_DATA0_PIN == 0) && (LCD_DATA1_PIN == 1) && (LCD_DATA2_PIN == 2) && (LCD_DATA3_PIN == 3)) { +        /* configure all port bits as output (all LCD data lines on same port, but control lines on different ports) */ +        DDR(LCD_DATA0_PORT) |= 0x0F; +        DDR(LCD_RS_PORT) |= _BV(LCD_RS_PIN); +        DDR(LCD_RW_PORT) |= _BV(LCD_RW_PIN); +        DDR(LCD_E_PORT) |= _BV(LCD_E_PIN); +    } else { +        /* configure all port bits as output (LCD data and control lines on different ports */ +        DDR(LCD_RS_PORT) |= _BV(LCD_RS_PIN); +        DDR(LCD_RW_PORT) |= _BV(LCD_RW_PIN); +        DDR(LCD_E_PORT) |= _BV(LCD_E_PIN); +        DDR(LCD_DATA0_PORT) |= _BV(LCD_DATA0_PIN); +        DDR(LCD_DATA1_PORT) |= _BV(LCD_DATA1_PIN); +        DDR(LCD_DATA2_PORT) |= _BV(LCD_DATA2_PIN); +        DDR(LCD_DATA3_PORT) |= _BV(LCD_DATA3_PIN); +    } +    delay(LCD_DELAY_BOOTUP); /* wait 16ms or more after power-on       */ + +    /* initial write to lcd is 8bit */ +    LCD_DATA1_PORT |= _BV(LCD_DATA1_PIN);  // LCD_FUNCTION>>4; +    LCD_DATA0_PORT |= _BV(LCD_DATA0_PIN);  // LCD_FUNCTION_8BIT>>4; +    lcd_e_toggle(); +    delay(LCD_DELAY_INIT); /* delay, busy flag can't be checked here */ + +    /* repeat last command */ +    lcd_e_toggle(); +    delay(LCD_DELAY_INIT_REP); /* delay, busy flag can't be checked here */ + +    /* repeat last command a third time */ +    lcd_e_toggle(); +    delay(LCD_DELAY_INIT_REP); /* delay, busy flag can't be checked here */ + +    /* now configure for 4bit mode */ +    LCD_DATA0_PORT &= ~_BV(LCD_DATA0_PIN);  // LCD_FUNCTION_4BIT_1LINE>>4 +    lcd_e_toggle(); +    delay(LCD_DELAY_INIT_4BIT); /* some displays need this additional delay */ + +    /* from now the LCD only accepts 4 bit I/O, we can use lcd_command() */ +#else +    /* +     * Initialize LCD to 8 bit memory mapped mode +     */ + +    /* enable external SRAM (memory mapped lcd) and one wait state */ +    MCUCR = _BV(SRE) | _BV(SRW); + +    /* reset LCD */ +    delay(LCD_DELAY_BOOTUP);               /* wait 16ms after power-on     */ +    lcd_write(LCD_FUNCTION_8BIT_1LINE, 0); /* function set: 8bit interface */ +    delay(LCD_DELAY_INIT);                 /* wait 5ms                     */ +    lcd_write(LCD_FUNCTION_8BIT_1LINE, 0); /* function set: 8bit interface */ +    delay(LCD_DELAY_INIT_REP);             /* wait 64us                    */ +    lcd_write(LCD_FUNCTION_8BIT_1LINE, 0); /* function set: 8bit interface */ +    delay(LCD_DELAY_INIT_REP);             /* wait 64us                    */ +#endif + +#if KS0073_4LINES_MODE +    /* Display with KS0073 controller requires special commands for enabling 4 line mode */ +    lcd_command(KS0073_EXTENDED_FUNCTION_REGISTER_ON); +    lcd_command(KS0073_4LINES_MODE); +    lcd_command(KS0073_EXTENDED_FUNCTION_REGISTER_OFF); +#else +    lcd_command(LCD_FUNCTION_DEFAULT);     /* function set: display lines  */ +#endif +    lcd_command(LCD_DISP_OFF);     /* display off                  */ +    lcd_clrscr();                  /* display clear                */ +    lcd_command(LCD_MODE_DEFAULT); /* set entry mode               */ +    lcd_command(dispAttr);         /* display/cursor control       */ + +} /* lcd_init */ diff --git a/platforms/avr/drivers/hd44780.h b/platforms/avr/drivers/hd44780.h new file mode 100644 index 0000000000..08e60f8a44 --- /dev/null +++ b/platforms/avr/drivers/hd44780.h @@ -0,0 +1,348 @@ +/************************************************************************* + Title	:   C include file for the HD44780U LCD library (lcd.c) + Author:    Peter Fleury <[email protected]>  http://tinyurl.com/peterfleury + License:   GNU General Public License Version 3 + File:	    $Id: lcd.h,v 1.14.2.4 2015/01/20 17:16:07 peter Exp $ + Software:  AVR-GCC 4.x + Hardware:  any AVR device, memory mapped mode only for AVR with +            memory mapped interface (AT90S8515/ATmega8515/ATmega128) +***************************************************************************/ + +/** + @mainpage + Collection of libraries for AVR-GCC + @author Peter Fleury [email protected] http://tinyurl.com/peterfleury + @copyright (C) 2015 Peter Fleury, GNU General Public License Version 3 + + @file + @defgroup pfleury_lcd LCD library <lcd.h> + @code #include <lcd.h> @endcode + + @brief Basic routines for interfacing a HD44780U-based character LCD display + + LCD character displays can be found in many devices, like espresso machines, laser printers. + The Hitachi HD44780 controller and its compatible controllers like Samsung KS0066U have become an industry standard for these types of displays. + + This library allows easy interfacing with a HD44780 compatible display and can be + operated in memory mapped mode (LCD_IO_MODE defined as 0 in the include file lcd.h.) or in + 4-bit IO port mode (LCD_IO_MODE defined as 1). 8-bit IO port mode is not supported. + + Memory mapped mode is compatible with old Kanda STK200 starter kit, but also supports + generation of R/W signal through A8 address line. + + @see The chapter <a href=" http://homepage.hispeed.ch/peterfleury/avr-lcd44780.html" target="_blank">Interfacing a HD44780 Based LCD to an AVR</a> +      on my home page, which shows example circuits how to connect an LCD to an AVR controller. + + @author Peter Fleury [email protected] http://tinyurl.com/peterfleury + + @version   2.0 + + @copyright (C) 2015 Peter Fleury, GNU General Public License Version 3 + +*/ + +#pragma once + +#include <inttypes.h> +#include <avr/pgmspace.h> + +#if (__GNUC__ * 100 + __GNUC_MINOR__) < 405 +#    error "This library requires AVR-GCC 4.5 or later, update to newer AVR-GCC compiler !" +#endif + +/**@{*/ + +/* + * LCD and target specific definitions below can be defined in a separate include file with name lcd_definitions.h instead modifying this file + * by adding -D_LCD_DEFINITIONS_FILE to the CDEFS section in the Makefile + * All definitions added to the file lcd_definitions.h will override the default definitions from lcd.h + */ +#ifdef _LCD_DEFINITIONS_FILE +#    include "lcd_definitions.h" +#endif + +/** + * @name  Definition for LCD controller type + * Use 0 for HD44780 controller, change to 1 for displays with KS0073 controller. + */ +#ifndef LCD_CONTROLLER_KS0073 +#    define LCD_CONTROLLER_KS0073 0 /**< Use 0 for HD44780 controller, 1 for KS0073 controller */ +#endif + +/** + * @name  Definitions for Display Size + * Change these definitions to adapt setting to your display + * + * These definitions can be defined in a separate include file \b lcd_definitions.h instead modifying this file by + * adding -D_LCD_DEFINITIONS_FILE to the CDEFS section in the Makefile. + * All definitions added to the file lcd_definitions.h will override the default definitions from lcd.h + * + */ +#ifndef LCD_LINES +#    define LCD_LINES 2 /**< number of visible lines of the display */ +#endif +#ifndef LCD_DISP_LENGTH +#    define LCD_DISP_LENGTH 16 /**< visibles characters per line of the display */ +#endif +#ifndef LCD_LINE_LENGTH +#    define LCD_LINE_LENGTH 0x40 /**< internal line length of the display    */ +#endif +#ifndef LCD_START_LINE1 +#    define LCD_START_LINE1 0x00 /**< DDRAM address of first char of line 1 */ +#endif +#ifndef LCD_START_LINE2 +#    define LCD_START_LINE2 0x40 /**< DDRAM address of first char of line 2 */ +#endif +#ifndef LCD_START_LINE3 +#    define LCD_START_LINE3 0x14 /**< DDRAM address of first char of line 3 */ +#endif +#ifndef LCD_START_LINE4 +#    define LCD_START_LINE4 0x54 /**< DDRAM address of first char of line 4 */ +#endif +#ifndef LCD_WRAP_LINES +#    define LCD_WRAP_LINES 0 /**< 0: no wrap, 1: wrap at end of visibile line */ +#endif + +/** + * @name Definitions for 4-bit IO mode + * + * The four LCD data lines and the three control lines RS, RW, E can be on the + * same port or on different ports. + * Change LCD_RS_PORT, LCD_RW_PORT, LCD_E_PORT if you want the control lines on + * different ports. + * + * Normally the four data lines should be mapped to bit 0..3 on one port, but it + * is possible to connect these data lines in different order or even on different + * ports by adapting the LCD_DATAx_PORT and LCD_DATAx_PIN definitions. + * + * Adjust these definitions to your target.\n + * These definitions can be defined in a separate include file \b lcd_definitions.h instead modifying this file by + * adding \b -D_LCD_DEFINITIONS_FILE to the \b CDEFS section in the Makefile. + * All definitions added to the file lcd_definitions.h will override the default definitions from lcd.h + * + */ +#define LCD_IO_MODE 1 /**< 0: memory mapped mode, 1: IO port mode */ + +#if LCD_IO_MODE + +#    ifndef LCD_PORT +#        define LCD_PORT PORTA /**< port for the LCD lines   */ +#    endif +#    ifndef LCD_DATA0_PORT +#        define LCD_DATA0_PORT LCD_PORT /**< port for 4bit data bit 0 */ +#    endif +#    ifndef LCD_DATA1_PORT +#        define LCD_DATA1_PORT LCD_PORT /**< port for 4bit data bit 1 */ +#    endif +#    ifndef LCD_DATA2_PORT +#        define LCD_DATA2_PORT LCD_PORT /**< port for 4bit data bit 2 */ +#    endif +#    ifndef LCD_DATA3_PORT +#        define LCD_DATA3_PORT LCD_PORT /**< port for 4bit data bit 3 */ +#    endif +#    ifndef LCD_DATA0_PIN +#        define LCD_DATA0_PIN 4 /**< pin for 4bit data bit 0  */ +#    endif +#    ifndef LCD_DATA1_PIN +#        define LCD_DATA1_PIN 5 /**< pin for 4bit data bit 1  */ +#    endif +#    ifndef LCD_DATA2_PIN +#        define LCD_DATA2_PIN 6 /**< pin for 4bit data bit 2  */ +#    endif +#    ifndef LCD_DATA3_PIN +#        define LCD_DATA3_PIN 7 /**< pin for 4bit data bit 3  */ +#    endif +#    ifndef LCD_RS_PORT +#        define LCD_RS_PORT LCD_PORT /**< port for RS line         */ +#    endif +#    ifndef LCD_RS_PIN +#        define LCD_RS_PIN 3 /**< pin  for RS line         */ +#    endif +#    ifndef LCD_RW_PORT +#        define LCD_RW_PORT LCD_PORT /**< port for RW line         */ +#    endif +#    ifndef LCD_RW_PIN +#        define LCD_RW_PIN 2 /**< pin  for RW line         */ +#    endif +#    ifndef LCD_E_PORT +#        define LCD_E_PORT LCD_PORT /**< port for Enable line     */ +#    endif +#    ifndef LCD_E_PIN +#        define LCD_E_PIN 1 /**< pin  for Enable line     */ +#    endif + +#elif defined(__AVR_AT90S4414__) || defined(__AVR_AT90S8515__) || defined(__AVR_ATmega64__) || defined(__AVR_ATmega8515__) || defined(__AVR_ATmega103__) || defined(__AVR_ATmega128__) || defined(__AVR_ATmega161__) || defined(__AVR_ATmega162__) +/* + * memory mapped mode is only supported when the device has an external data memory interface + */ +#    define LCD_IO_DATA 0xC000     /* A15=E=1, A14=RS=1                 */ +#    define LCD_IO_FUNCTION 0x8000 /* A15=E=1, A14=RS=0                 */ +#    define LCD_IO_READ 0x0100     /* A8 =R/W=1 (R/W: 1=Read, 0=Write   */ + +#else +#    error "external data memory interface not available for this device, use 4-bit IO port mode" + +#endif + +/** + * @name Definitions of delays + * Used to calculate delay timers. + * Adapt the F_CPU define in the Makefile to the clock frequency in Hz of your target + * + * These delay times can be adjusted, if some displays require different delays.\n + * These definitions can be defined in a separate include file \b lcd_definitions.h instead modifying this file by + * adding \b -D_LCD_DEFINITIONS_FILE to the \b CDEFS section in the Makefile. + * All definitions added to the file lcd_definitions.h will override the default definitions from lcd.h + */ +#ifndef LCD_DELAY_BOOTUP +#    define LCD_DELAY_BOOTUP 16000 /**< delay in micro seconds after power-on  */ +#endif +#ifndef LCD_DELAY_INIT +#    define LCD_DELAY_INIT 5000 /**< delay in micro seconds after initialization command sent  */ +#endif +#ifndef LCD_DELAY_INIT_REP +#    define LCD_DELAY_INIT_REP 64 /**< delay in micro seconds after initialization command repeated */ +#endif +#ifndef LCD_DELAY_INIT_4BIT +#    define LCD_DELAY_INIT_4BIT 64 /**< delay in micro seconds after setting 4-bit mode */ +#endif +#ifndef LCD_DELAY_BUSY_FLAG +#    define LCD_DELAY_BUSY_FLAG 4 /**< time in micro seconds the address counter is updated after busy flag is cleared */ +#endif +#ifndef LCD_DELAY_ENABLE_PULSE +#    define LCD_DELAY_ENABLE_PULSE 1 /**< enable signal pulse width in micro seconds */ +#endif + +/** + * @name Definitions for LCD command instructions + * The constants define the various LCD controller instructions which can be passed to the + * function lcd_command(), see HD44780 data sheet for a complete description. + */ + +/* instruction register bit positions, see HD44780U data sheet */ +#define LCD_CLR 0             /* DB0: clear display                  */ +#define LCD_HOME 1            /* DB1: return to home position        */ +#define LCD_ENTRY_MODE 2      /* DB2: set entry mode                 */ +#define LCD_ENTRY_INC 1       /*   DB1: 1=increment, 0=decrement     */ +#define LCD_ENTRY_SHIFT 0     /*   DB2: 1=display shift on           */ +#define LCD_ON 3              /* DB3: turn lcd/cursor on             */ +#define LCD_ON_DISPLAY 2      /*   DB2: turn display on              */ +#define LCD_ON_CURSOR 1       /*   DB1: turn cursor on               */ +#define LCD_ON_BLINK 0        /*     DB0: blinking cursor ?          */ +#define LCD_MOVE 4            /* DB4: move cursor/display            */ +#define LCD_MOVE_DISP 3       /*   DB3: move display (0-> cursor) ?  */ +#define LCD_MOVE_RIGHT 2      /*   DB2: move right (0-> left) ?      */ +#define LCD_FUNCTION 5        /* DB5: function set                   */ +#define LCD_FUNCTION_8BIT 4   /*   DB4: set 8BIT mode (0->4BIT mode) */ +#define LCD_FUNCTION_2LINES 3 /*   DB3: two lines (0->one line)      */ +#define LCD_FUNCTION_10DOTS 2 /*   DB2: 5x10 font (0->5x7 font)      */ +#define LCD_CGRAM 6           /* DB6: set CG RAM address             */ +#define LCD_DDRAM 7           /* DB7: set DD RAM address             */ +#define LCD_BUSY 7            /* DB7: LCD is busy                    */ + +/* set entry mode: display shift on/off, dec/inc cursor move direction */ +#define LCD_ENTRY_DEC 0x04       /* display shift off, dec cursor move dir */ +#define LCD_ENTRY_DEC_SHIFT 0x05 /* display shift on,  dec cursor move dir */ +#define LCD_ENTRY_INC_ 0x06      /* display shift off, inc cursor move dir */ +#define LCD_ENTRY_INC_SHIFT 0x07 /* display shift on,  inc cursor move dir */ + +/* display on/off, cursor on/off, blinking char at cursor position */ +#define LCD_DISP_OFF 0x08             /* display off                            */ +#define LCD_DISP_ON 0x0C              /* display on, cursor off                 */ +#define LCD_DISP_ON_BLINK 0x0D        /* display on, cursor off, blink char     */ +#define LCD_DISP_ON_CURSOR 0x0E       /* display on, cursor on                  */ +#define LCD_DISP_ON_CURSOR_BLINK 0x0F /* display on, cursor on, blink char      */ + +/* move cursor/shift display */ +#define LCD_MOVE_CURSOR_LEFT 0x10  /* move cursor left  (decrement)          */ +#define LCD_MOVE_CURSOR_RIGHT 0x14 /* move cursor right (increment)          */ +#define LCD_MOVE_DISP_LEFT 0x18    /* shift display left                     */ +#define LCD_MOVE_DISP_RIGHT 0x1C   /* shift display right                    */ + +/* function set: set interface data length and number of display lines */ +#define LCD_FUNCTION_4BIT_1LINE 0x20  /* 4-bit interface, single line, 5x7 dots */ +#define LCD_FUNCTION_4BIT_2LINES 0x28 /* 4-bit interface, dual line,   5x7 dots */ +#define LCD_FUNCTION_8BIT_1LINE 0x30  /* 8-bit interface, single line, 5x7 dots */ +#define LCD_FUNCTION_8BIT_2LINES 0x38 /* 8-bit interface, dual line,   5x7 dots */ + +#define LCD_MODE_DEFAULT ((1 << LCD_ENTRY_MODE) | (1 << LCD_ENTRY_INC)) + +/** + *  @name Functions + */ + +/** + @brief    Initialize display and select type of cursor + @param    dispAttr \b LCD_DISP_OFF display off\n +                    \b LCD_DISP_ON display on, cursor off\n +                    \b LCD_DISP_ON_CURSOR display on, cursor on\n +                    \b LCD_DISP_ON_CURSOR_BLINK display on, cursor on flashing + @return  none +*/ +extern void lcd_init(uint8_t dispAttr); + +/** + @brief    Clear display and set cursor to home position + @return   none +*/ +extern void lcd_clrscr(void); + +/** + @brief    Set cursor to home position + @return   none +*/ +extern void lcd_home(void); + +/** + @brief    Set cursor to specified position + + @param    x horizontal position\n (0: left most position) + @param    y vertical position\n   (0: first line) + @return   none +*/ +extern void lcd_gotoxy(uint8_t x, uint8_t y); + +/** + @brief    Display character at current cursor position + @param    c character to be displayed + @return   none +*/ +extern void lcd_putc(char c); + +/** + @brief    Display string without auto linefeed + @param    s string to be displayed + @return   none +*/ +extern void lcd_puts(const char *s); + +/** + @brief    Display string from program memory without auto linefeed + @param    progmem_s string from program memory be be displayed + @return   none + @see      lcd_puts_P +*/ +extern void lcd_puts_p(const char *progmem_s); + +/** + @brief    Send LCD controller instruction command + @param    cmd instruction to send to LCD controller, see HD44780 data sheet + @return   none +*/ +extern void lcd_command(uint8_t cmd); + +/** + @brief    Send data byte to LCD controller + + Similar to lcd_putc(), but without interpreting LF + @param    data byte to send to LCD controller, see HD44780 data sheet + @return   none +*/ +extern void lcd_data(uint8_t data); + +/** + @brief macros for automatically storing string constant in program memory +*/ +#define lcd_puts_P(__s) lcd_puts_p(PSTR(__s)) + +/**@}*/ diff --git a/platforms/avr/drivers/i2c_master.c b/platforms/avr/drivers/i2c_master.c new file mode 100644 index 0000000000..2773e00778 --- /dev/null +++ b/platforms/avr/drivers/i2c_master.c @@ -0,0 +1,241 @@ +/*  Copyright (C) 2019 Elia Ritterbusch + + + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ +/* Library made by: g4lvanix + * GitHub repository: https://github.com/g4lvanix/I2C-master-lib + */ + +#include <avr/io.h> +#include <util/twi.h> + +#include "i2c_master.h" +#include "timer.h" +#include "wait.h" + +#ifndef F_SCL +#    define F_SCL 400000UL  // SCL frequency +#endif + +#ifndef I2C_START_RETRY_COUNT +#    define I2C_START_RETRY_COUNT 20 +#endif  // I2C_START_RETRY_COUNT + +#define TWBR_val (((F_CPU / F_SCL) - 16) / 2) + +#define MAX(X, Y) ((X) > (Y) ? (X) : (Y)) + +void i2c_init(void) { +    TWSR = 0; /* no prescaler */ +    TWBR = (uint8_t)TWBR_val; + +#ifdef __AVR_ATmega32A__ +    // set pull-up resistors on I2C bus pins +    PORTC |= 0b11; + +    // enable TWI (two-wire interface) +    TWCR |= (1 << TWEN); + +    // enable TWI interrupt and slave address ACK +    TWCR |= (1 << TWIE); +    TWCR |= (1 << TWEA); +#endif +} + +static i2c_status_t i2c_start_impl(uint8_t address, uint16_t timeout) { +    // reset TWI control register +    TWCR = 0; +    // transmit START condition +    TWCR = (1 << TWINT) | (1 << TWSTA) | (1 << TWEN); + +    uint16_t timeout_timer = timer_read(); +    while (!(TWCR & (1 << TWINT))) { +        if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) { +            return I2C_STATUS_TIMEOUT; +        } +    } + +    // check if the start condition was successfully transmitted +    if (((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)) { +        return I2C_STATUS_ERROR; +    } + +    // load slave address into data register +    TWDR = address; +    // start transmission of address +    TWCR = (1 << TWINT) | (1 << TWEN); + +    timeout_timer = timer_read(); +    while (!(TWCR & (1 << TWINT))) { +        if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) { +            return I2C_STATUS_TIMEOUT; +        } +    } + +    // check if the device has acknowledged the READ / WRITE mode +    uint8_t twst = TW_STATUS & 0xF8; +    if ((twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK)) { +        return I2C_STATUS_ERROR; +    } + +    return I2C_STATUS_SUCCESS; +} + +i2c_status_t i2c_start(uint8_t address, uint16_t timeout) { +    // Retry i2c_start_impl a bunch times in case the remote side has interrupts disabled. +    uint16_t     timeout_timer = timer_read(); +    uint16_t     time_slice    = MAX(1, (timeout == (I2C_TIMEOUT_INFINITE)) ? 5 : (timeout / (I2C_START_RETRY_COUNT)));  // if it's infinite, wait 1ms between attempts, otherwise split up the entire timeout into the number of retries +    i2c_status_t status; +    do { +        status = i2c_start_impl(address, time_slice); +    } while ((status < 0) && ((timeout == I2C_TIMEOUT_INFINITE) || (timer_elapsed(timeout_timer) < timeout))); +    return status; +} + +i2c_status_t i2c_write(uint8_t data, uint16_t timeout) { +    // load data into data register +    TWDR = data; +    // start transmission of data +    TWCR = (1 << TWINT) | (1 << TWEN); + +    uint16_t timeout_timer = timer_read(); +    while (!(TWCR & (1 << TWINT))) { +        if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) { +            return I2C_STATUS_TIMEOUT; +        } +    } + +    if ((TW_STATUS & 0xF8) != TW_MT_DATA_ACK) { +        return I2C_STATUS_ERROR; +    } + +    return I2C_STATUS_SUCCESS; +} + +int16_t i2c_read_ack(uint16_t timeout) { +    // start TWI module and acknowledge data after reception +    TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWEA); + +    uint16_t timeout_timer = timer_read(); +    while (!(TWCR & (1 << TWINT))) { +        if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) { +            return I2C_STATUS_TIMEOUT; +        } +    } + +    // return received data from TWDR +    return TWDR; +} + +int16_t i2c_read_nack(uint16_t timeout) { +    // start receiving without acknowledging reception +    TWCR = (1 << TWINT) | (1 << TWEN); + +    uint16_t timeout_timer = timer_read(); +    while (!(TWCR & (1 << TWINT))) { +        if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) { +            return I2C_STATUS_TIMEOUT; +        } +    } + +    // return received data from TWDR +    return TWDR; +} + +i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_status_t status = i2c_start(address | I2C_WRITE, timeout); + +    for (uint16_t i = 0; i < length && status >= 0; i++) { +        status = i2c_write(data[i], timeout); +    } + +    i2c_stop(); + +    return status; +} + +i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_status_t status = i2c_start(address | I2C_READ, timeout); + +    for (uint16_t i = 0; i < (length - 1) && status >= 0; i++) { +        status = i2c_read_ack(timeout); +        if (status >= 0) { +            data[i] = status; +        } +    } + +    if (status >= 0) { +        status = i2c_read_nack(timeout); +        if (status >= 0) { +            data[(length - 1)] = status; +        } +    } + +    i2c_stop(); + +    return (status < 0) ? status : I2C_STATUS_SUCCESS; +} + +i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_status_t status = i2c_start(devaddr | 0x00, timeout); +    if (status >= 0) { +        status = i2c_write(regaddr, timeout); + +        for (uint16_t i = 0; i < length && status >= 0; i++) { +            status = i2c_write(data[i], timeout); +        } +    } + +    i2c_stop(); + +    return status; +} + +i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_status_t status = i2c_start(devaddr, timeout); +    if (status < 0) { +        goto error; +    } + +    status = i2c_write(regaddr, timeout); +    if (status < 0) { +        goto error; +    } + +    status = i2c_start(devaddr | 0x01, timeout); + +    for (uint16_t i = 0; i < (length - 1) && status >= 0; i++) { +        status = i2c_read_ack(timeout); +        if (status >= 0) { +            data[i] = status; +        } +    } + +    if (status >= 0) { +        status = i2c_read_nack(timeout); +        if (status >= 0) { +            data[(length - 1)] = status; +        } +    } + +error: +    i2c_stop(); + +    return (status < 0) ? status : I2C_STATUS_SUCCESS; +} + +void i2c_stop(void) { +    // transmit STOP condition +    TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWSTO); +} diff --git a/platforms/avr/drivers/i2c_master.h b/platforms/avr/drivers/i2c_master.h new file mode 100644 index 0000000000..e5af73364b --- /dev/null +++ b/platforms/avr/drivers/i2c_master.h @@ -0,0 +1,43 @@ +/*  Copyright (C) 2019 Elia Ritterbusch + + + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ +/* Library made by: g4lvanix + * GitHub repository: https://github.com/g4lvanix/I2C-master-lib + */ + +#pragma once + +#define I2C_READ 0x01 +#define I2C_WRITE 0x00 + +typedef int16_t i2c_status_t; + +#define I2C_STATUS_SUCCESS (0) +#define I2C_STATUS_ERROR (-1) +#define I2C_STATUS_TIMEOUT (-2) + +#define I2C_TIMEOUT_IMMEDIATE (0) +#define I2C_TIMEOUT_INFINITE (0xFFFF) + +void         i2c_init(void); +i2c_status_t i2c_start(uint8_t address, uint16_t timeout); +i2c_status_t i2c_write(uint8_t data, uint16_t timeout); +int16_t      i2c_read_ack(uint16_t timeout); +int16_t      i2c_read_nack(uint16_t timeout); +i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout); +void         i2c_stop(void); diff --git a/platforms/avr/drivers/i2c_slave.c b/platforms/avr/drivers/i2c_slave.c new file mode 100644 index 0000000000..2907f164c0 --- /dev/null +++ b/platforms/avr/drivers/i2c_slave.c @@ -0,0 +1,111 @@ +/*  Copyright (C) 2019 Elia Ritterbusch + + + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ +/* Library made by: g4lvanix + * GitHub repository: https://github.com/g4lvanix/I2C-slave-lib + */ + +#include <stddef.h> +#include <avr/io.h> +#include <util/twi.h> +#include <avr/interrupt.h> +#include <stdbool.h> + +#include "i2c_slave.h" + +#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +#    include "transactions.h" + +static volatile bool is_callback_executor = false; +#endif  // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) + +volatile uint8_t i2c_slave_reg[I2C_SLAVE_REG_COUNT]; + +static volatile uint8_t buffer_address; +static volatile bool    slave_has_register_set = false; + +void i2c_slave_init(uint8_t address) { +    // load address into TWI address register +    TWAR = address; +    // set the TWCR to enable address matching and enable TWI, clear TWINT, enable TWI interrupt +    TWCR = (1 << TWIE) | (1 << TWEA) | (1 << TWINT) | (1 << TWEN); +} + +void i2c_slave_stop(void) { +    // clear acknowledge and enable bits +    TWCR &= ~((1 << TWEA) | (1 << TWEN)); +} + +ISR(TWI_vect) { +    uint8_t ack = 1; + +    switch (TW_STATUS) { +        case TW_SR_SLA_ACK: +            // The device is now a slave receiver +            slave_has_register_set = false; +#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +            is_callback_executor = false; +#endif  // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +            break; + +        case TW_SR_DATA_ACK: +            // This device is a slave receiver and has received data +            // First byte is the location then the bytes will be writen in buffer with auto-increment +            if (!slave_has_register_set) { +                buffer_address = TWDR; + +                if (buffer_address >= I2C_SLAVE_REG_COUNT) {  // address out of bounds dont ack +                    ack            = 0; +                    buffer_address = 0; +                } +                slave_has_register_set = true;  // address has been received now fill in buffer + +#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +                // Work out if we're attempting to execute a callback +                is_callback_executor = buffer_address == split_transaction_table[I2C_EXECUTE_CALLBACK].initiator2target_offset; +#endif  // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +            } else { +                i2c_slave_reg[buffer_address] = TWDR; +                buffer_address++; + +#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +                // If we're intending to execute a transaction callback, do so, as we've just received the transaction ID +                if (is_callback_executor) { +                    split_transaction_desc_t *trans = &split_transaction_table[split_shmem->transaction_id]; +                    if (trans->slave_callback) { +                        trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans)); +                    } +                } +#endif  // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +            } +            break; + +        case TW_ST_SLA_ACK: +        case TW_ST_DATA_ACK: +            // This device is a slave transmitter and master has requested data +            TWDR = i2c_slave_reg[buffer_address]; +            buffer_address++; +            break; + +        case TW_BUS_ERROR: +            // We got an error, reset i2c +            TWCR = 0; +        default: +            break; +    } + +    // Reset i2c state machine to be ready for next interrupt +    TWCR |= (1 << TWIE) | (1 << TWINT) | (ack << TWEA) | (1 << TWEN); +} diff --git a/platforms/avr/drivers/i2c_slave.h b/platforms/avr/drivers/i2c_slave.h new file mode 100644 index 0000000000..a8647c9da3 --- /dev/null +++ b/platforms/avr/drivers/i2c_slave.h @@ -0,0 +1,41 @@ +/*  Copyright (C) 2019 Elia Ritterbusch + + + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ +/* Library made by: g4lvanix + * GitHub repository: https://github.com/g4lvanix/I2C-slave-lib + + Info: Inititate the library by giving the required address. +       Read or write to the necessary buffer according to the opperation. + */ + +#pragma once + +#ifndef I2C_SLAVE_REG_COUNT + +#    if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +#        include "transport.h" +#        define I2C_SLAVE_REG_COUNT sizeof(split_shared_memory_t) +#    else  // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) +#        define I2C_SLAVE_REG_COUNT 30 +#    endif  // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS) + +#endif  // I2C_SLAVE_REG_COUNT + +_Static_assert(I2C_SLAVE_REG_COUNT < 256, "I2C target registers must be single byte"); + +extern volatile uint8_t i2c_slave_reg[I2C_SLAVE_REG_COUNT]; + +void i2c_slave_init(uint8_t address); +void i2c_slave_stop(void); diff --git a/platforms/avr/drivers/serial.c b/platforms/avr/drivers/serial.c new file mode 100644 index 0000000000..9a7345a53d --- /dev/null +++ b/platforms/avr/drivers/serial.c @@ -0,0 +1,529 @@ +/* + * WARNING: be careful changing this code, it is very timing dependent + * + * 2018-10-28 checked + *  avr-gcc 4.9.2 + *  avr-gcc 5.4.0 + *  avr-gcc 7.3.0 + */ + +#ifndef F_CPU +#    define F_CPU 16000000 +#endif + +#include <avr/io.h> +#include <avr/interrupt.h> +#include <util/delay.h> +#include <stddef.h> +#include <stdbool.h> +#include "serial.h" + +#ifdef SOFT_SERIAL_PIN + +#    if !(defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) || defined(__AVR_AT90USB162__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)) +#        error serial.c is not supported for the currently selected MCU +#    endif +// if using ATmega32U4/2, AT90USBxxx I2C, can not use PD0 and PD1 in soft serial. +#    if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) +#        if defined(USE_AVR_I2C) && (SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1) +#            error Using I2C, so can not use PD0, PD1 +#        endif +#    endif +// PD0..PD3, common config +#    if SOFT_SERIAL_PIN == D0 +#        define EIMSK_BIT _BV(INT0) +#        define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01))) +#        define SERIAL_PIN_INTERRUPT INT0_vect +#        define EICRx EICRA +#    elif SOFT_SERIAL_PIN == D1 +#        define EIMSK_BIT _BV(INT1) +#        define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11))) +#        define SERIAL_PIN_INTERRUPT INT1_vect +#        define EICRx EICRA +#    elif SOFT_SERIAL_PIN == D2 +#        define EIMSK_BIT _BV(INT2) +#        define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21))) +#        define SERIAL_PIN_INTERRUPT INT2_vect +#        define EICRx EICRA +#    elif SOFT_SERIAL_PIN == D3 +#        define EIMSK_BIT _BV(INT3) +#        define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31))) +#        define SERIAL_PIN_INTERRUPT INT3_vect +#        define EICRx EICRA +#    endif + +// ATmegaxxU2/AT90USB162 specific config +#    if defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_AT90USB162__) +// PD4(INT5), PD6(INT6), PD7(INT7), PC7(INT4) +#        if SOFT_SERIAL_PIN == D4 +#            define EIMSK_BIT _BV(INT5) +#            define EICRx_BIT (~(_BV(ISC50) | _BV(ISC51))) +#            define SERIAL_PIN_INTERRUPT INT5_vect +#            define EICRx EICRB +#        elif SOFT_SERIAL_PIN == D6 +#            define EIMSK_BIT _BV(INT6) +#            define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61))) +#            define SERIAL_PIN_INTERRUPT INT6_vect +#            define EICRx EICRB +#        elif SOFT_SERIAL_PIN == D7 +#            define EIMSK_BIT _BV(INT7) +#            define EICRx_BIT (~(_BV(ISC70) | _BV(ISC71))) +#            define SERIAL_PIN_INTERRUPT INT7_vect +#            define EICRx EICRB +#        elif SOFT_SERIAL_PIN == C7 +#            define EIMSK_BIT _BV(INT4) +#            define EICRx_BIT (~(_BV(ISC40) | _BV(ISC41))) +#            define SERIAL_PIN_INTERRUPT INT4_vect +#            define EICRx EICRB +#        endif +#    endif + +// ATmegaxxU4 specific config +#    if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) +// PE6(INT6) +#        if SOFT_SERIAL_PIN == E6 +#            define EIMSK_BIT _BV(INT6) +#            define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61))) +#            define SERIAL_PIN_INTERRUPT INT6_vect +#            define EICRx EICRB +#        endif +#    endif + +// AT90USBxxx specific config +#    if defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) +// PE4..PE7(INT4..INT7) +#        if SOFT_SERIAL_PIN == E4 +#            define EIMSK_BIT _BV(INT4) +#            define EICRx_BIT (~(_BV(ISC40) | _BV(ISC41))) +#            define SERIAL_PIN_INTERRUPT INT4_vect +#            define EICRx EICRB +#        elif SOFT_SERIAL_PIN == E5 +#            define EIMSK_BIT _BV(INT5) +#            define EICRx_BIT (~(_BV(ISC50) | _BV(ISC51))) +#            define SERIAL_PIN_INTERRUPT INT5_vect +#            define EICRx EICRB +#        elif SOFT_SERIAL_PIN == E6 +#            define EIMSK_BIT _BV(INT6) +#            define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61))) +#            define SERIAL_PIN_INTERRUPT INT6_vect +#            define EICRx EICRB +#        elif SOFT_SERIAL_PIN == E7 +#            define EIMSK_BIT _BV(INT7) +#            define EICRx_BIT (~(_BV(ISC70) | _BV(ISC71))) +#            define SERIAL_PIN_INTERRUPT INT7_vect +#            define EICRx EICRB +#        endif +#    endif + +#    ifndef SERIAL_PIN_INTERRUPT +#        error invalid SOFT_SERIAL_PIN value +#    endif + +#    define setPinInputHigh(pin) (DDRx_ADDRESS(pin) &= ~_BV((pin)&0xF), PORTx_ADDRESS(pin) |= _BV((pin)&0xF)) +#    define setPinOutput(pin) (DDRx_ADDRESS(pin) |= _BV((pin)&0xF)) +#    define writePinHigh(pin) (PORTx_ADDRESS(pin) |= _BV((pin)&0xF)) +#    define writePinLow(pin) (PORTx_ADDRESS(pin) &= ~_BV((pin)&0xF)) +#    define readPin(pin) ((bool)(PINx_ADDRESS(pin) & _BV((pin)&0xF))) + +#    define ALWAYS_INLINE __attribute__((always_inline)) +#    define NO_INLINE __attribute__((noinline)) +#    define _delay_sub_us(x) __builtin_avr_delay_cycles(x) + +// parity check +#    define ODD_PARITY 1 +#    define EVEN_PARITY 0 +#    define PARITY EVEN_PARITY + +#    ifdef SERIAL_DELAY +// custom setup in config.h +// #define TID_SEND_ADJUST 2 +// #define SERIAL_DELAY 6             // micro sec +// #define READ_WRITE_START_ADJUST 30 // cycles +// #define READ_WRITE_WIDTH_ADJUST 8 // cycles +#    else +// ============ Standard setups ============ + +#        ifndef SELECT_SOFT_SERIAL_SPEED +#            define SELECT_SOFT_SERIAL_SPEED 1 +//  0: about 189kbps (Experimental only) +//  1: about 137kbps (default) +//  2: about 75kbps +//  3: about 39kbps +//  4: about 26kbps +//  5: about 20kbps +#        endif + +#        if __GNUC__ < 6 +#            define TID_SEND_ADJUST 14 +#        else +#            define TID_SEND_ADJUST 2 +#        endif + +#        if SELECT_SOFT_SERIAL_SPEED == 0 +// Very High speed +#            define SERIAL_DELAY 4  // micro sec +#            if __GNUC__ < 6 +#                define READ_WRITE_START_ADJUST 33  // cycles +#                define READ_WRITE_WIDTH_ADJUST 3   // cycles +#            else +#                define READ_WRITE_START_ADJUST 34  // cycles +#                define READ_WRITE_WIDTH_ADJUST 7   // cycles +#            endif +#        elif SELECT_SOFT_SERIAL_SPEED == 1 +// High speed +#            define SERIAL_DELAY 6  // micro sec +#            if __GNUC__ < 6 +#                define READ_WRITE_START_ADJUST 30  // cycles +#                define READ_WRITE_WIDTH_ADJUST 3   // cycles +#            else +#                define READ_WRITE_START_ADJUST 33  // cycles +#                define READ_WRITE_WIDTH_ADJUST 7   // cycles +#            endif +#        elif SELECT_SOFT_SERIAL_SPEED == 2 +// Middle speed +#            define SERIAL_DELAY 12             // micro sec +#            define READ_WRITE_START_ADJUST 30  // cycles +#            if __GNUC__ < 6 +#                define READ_WRITE_WIDTH_ADJUST 3  // cycles +#            else +#                define READ_WRITE_WIDTH_ADJUST 7  // cycles +#            endif +#        elif SELECT_SOFT_SERIAL_SPEED == 3 +// Low speed +#            define SERIAL_DELAY 24             // micro sec +#            define READ_WRITE_START_ADJUST 30  // cycles +#            if __GNUC__ < 6 +#                define READ_WRITE_WIDTH_ADJUST 3  // cycles +#            else +#                define READ_WRITE_WIDTH_ADJUST 7  // cycles +#            endif +#        elif SELECT_SOFT_SERIAL_SPEED == 4 +// Very Low speed +#            define SERIAL_DELAY 36             // micro sec +#            define READ_WRITE_START_ADJUST 30  // cycles +#            if __GNUC__ < 6 +#                define READ_WRITE_WIDTH_ADJUST 3  // cycles +#            else +#                define READ_WRITE_WIDTH_ADJUST 7  // cycles +#            endif +#        elif SELECT_SOFT_SERIAL_SPEED == 5 +// Ultra Low speed +#            define SERIAL_DELAY 48             // micro sec +#            define READ_WRITE_START_ADJUST 30  // cycles +#            if __GNUC__ < 6 +#                define READ_WRITE_WIDTH_ADJUST 3  // cycles +#            else +#                define READ_WRITE_WIDTH_ADJUST 7  // cycles +#            endif +#        else +#            error invalid SELECT_SOFT_SERIAL_SPEED value +#        endif /* SELECT_SOFT_SERIAL_SPEED */ +#    endif     /* SERIAL_DELAY */ + +#    define SERIAL_DELAY_HALF1 (SERIAL_DELAY / 2) +#    define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY / 2) + +#    define SLAVE_INT_WIDTH_US 1 +#    define SLAVE_INT_ACK_WIDTH_UNIT 2 +#    define SLAVE_INT_ACK_WIDTH 4 + +inline static void serial_delay(void) ALWAYS_INLINE; +inline static void serial_delay(void) { _delay_us(SERIAL_DELAY); } + +inline static void serial_delay_half1(void) ALWAYS_INLINE; +inline static void serial_delay_half1(void) { _delay_us(SERIAL_DELAY_HALF1); } + +inline static void serial_delay_half2(void) ALWAYS_INLINE; +inline static void serial_delay_half2(void) { _delay_us(SERIAL_DELAY_HALF2); } + +inline static void serial_output(void) ALWAYS_INLINE; +inline static void serial_output(void) { setPinOutput(SOFT_SERIAL_PIN); } + +// make the serial pin an input with pull-up resistor +inline static void serial_input_with_pullup(void) ALWAYS_INLINE; +inline static void serial_input_with_pullup(void) { setPinInputHigh(SOFT_SERIAL_PIN); } + +inline static uint8_t serial_read_pin(void) ALWAYS_INLINE; +inline static uint8_t serial_read_pin(void) { return !!readPin(SOFT_SERIAL_PIN); } + +inline static void serial_low(void) ALWAYS_INLINE; +inline static void serial_low(void) { writePinLow(SOFT_SERIAL_PIN); } + +inline static void serial_high(void) ALWAYS_INLINE; +inline static void serial_high(void) { writePinHigh(SOFT_SERIAL_PIN); } + +void soft_serial_initiator_init(void) { +    serial_output(); +    serial_high(); +} + +void soft_serial_target_init(void) { +    serial_input_with_pullup(); + +    // Enable INT0-INT7 +    EIMSK |= EIMSK_BIT; +    EICRx &= EICRx_BIT; +} + +// Used by the sender to synchronize timing with the reciver. +static void sync_recv(void) NO_INLINE; +static void sync_recv(void) { +    for (uint8_t i = 0; i < SERIAL_DELAY * 5 && serial_read_pin(); i++) { +    } +    // This shouldn't hang if the target disconnects because the +    // serial line will float to high if the target does disconnect. +    while (!serial_read_pin()) +        ; +} + +// Used by the reciver to send a synchronization signal to the sender. +static void sync_send(void) NO_INLINE; +static void sync_send(void) { +    serial_low(); +    serial_delay(); +    serial_high(); +} + +// Reads a byte from the serial line +static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE; +static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) { +    uint8_t byte, i, p, pb; + +    _delay_sub_us(READ_WRITE_START_ADJUST); +    for (i = 0, byte = 0, p = PARITY; i < bit; i++) { +        serial_delay_half1();  // read the middle of pulses +        if (serial_read_pin()) { +            byte = (byte << 1) | 1; +            p ^= 1; +        } else { +            byte = (byte << 1) | 0; +            p ^= 0; +        } +        _delay_sub_us(READ_WRITE_WIDTH_ADJUST); +        serial_delay_half2(); +    } +    /* recive parity bit */ +    serial_delay_half1();  // read the middle of pulses +    pb = serial_read_pin(); +    _delay_sub_us(READ_WRITE_WIDTH_ADJUST); +    serial_delay_half2(); + +    *pterrcount += (p != pb) ? 1 : 0; + +    return byte; +} + +// Sends a byte with MSB ordering +void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE; +void serial_write_chunk(uint8_t data, uint8_t bit) { +    uint8_t b, p; +    for (p = PARITY, b = 1 << (bit - 1); b; b >>= 1) { +        if (data & b) { +            serial_high(); +            p ^= 1; +        } else { +            serial_low(); +            p ^= 0; +        } +        serial_delay(); +    } +    /* send parity bit */ +    if (p & 1) { +        serial_high(); +    } else { +        serial_low(); +    } +    serial_delay(); + +    serial_low();  // sync_send() / senc_recv() need raise edge +} + +static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE; +static void serial_send_packet(uint8_t *buffer, uint8_t size) { +    for (uint8_t i = 0; i < size; ++i) { +        uint8_t data; +        data = buffer[i]; +        sync_send(); +        serial_write_chunk(data, 8); +    } +} + +static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE; +static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) { +    uint8_t pecount = 0; +    for (uint8_t i = 0; i < size; ++i) { +        uint8_t data; +        sync_recv(); +        data      = serial_read_chunk(&pecount, 8); +        buffer[i] = data; +    } +    return pecount == 0; +} + +inline static void change_sender2reciver(void) { +    sync_send();                 // 0 +    serial_delay_half1();        // 1 +    serial_low();                // 2 +    serial_input_with_pullup();  // 2 +    serial_delay_half1();        // 3 +} + +inline static void change_reciver2sender(void) { +    sync_recv();           // 0 +    serial_delay();        // 1 +    serial_low();          // 3 +    serial_output();       // 3 +    serial_delay_half1();  // 4 +} + +static inline uint8_t nibble_bits_count(uint8_t bits) { +    bits = (bits & 0x5) + (bits >> 1 & 0x5); +    bits = (bits & 0x3) + (bits >> 2 & 0x3); +    return bits; +} + +// interrupt handle to be used by the target device +ISR(SERIAL_PIN_INTERRUPT) { +    // recive transaction table index +    uint8_t tid, bits; +    uint8_t pecount = 0; +    sync_recv(); +    bits = serial_read_chunk(&pecount, 8); +    tid  = bits >> 3; +    bits = (bits & 7) != (nibble_bits_count(tid) & 7); +    if (bits || pecount > 0 || tid > NUM_TOTAL_TRANSACTIONS) { +        return; +    } +    serial_delay_half1(); + +    serial_high();  // response step1 low->high +    serial_output(); +    _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT * SLAVE_INT_ACK_WIDTH); +    split_transaction_desc_t *trans = &split_transaction_table[tid]; +    serial_low();  // response step2 ack high->low + +    // If the transaction has a callback, we can execute it now +    if (trans->slave_callback) { +        trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans)); +    } + +    // target send phase +    if (trans->target2initiator_buffer_size > 0) serial_send_packet((uint8_t *)split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size); +    // target switch to input +    change_sender2reciver(); + +    // target recive phase +    if (trans->initiator2target_buffer_size > 0) { +        if (serial_recive_packet((uint8_t *)split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size)) { +            *trans->status = TRANSACTION_ACCEPTED; +        } else { +            *trans->status = TRANSACTION_DATA_ERROR; +        } +    } else { +        *trans->status = TRANSACTION_ACCEPTED; +    } + +    sync_recv();  // weit initiator output to high +} + +///////// +//  start transaction by initiator +// +// int  soft_serial_transaction(int sstd_index) +// +// Returns: +//    TRANSACTION_END +//    TRANSACTION_NO_RESPONSE +//    TRANSACTION_DATA_ERROR +// this code is very time dependent, so we need to disable interrupts +int soft_serial_transaction(int sstd_index) { +    if (sstd_index > NUM_TOTAL_TRANSACTIONS) return TRANSACTION_TYPE_ERROR; +    split_transaction_desc_t *trans = &split_transaction_table[sstd_index]; + +    if (!trans->status) return TRANSACTION_TYPE_ERROR;  // not registered + +    cli(); + +    // signal to the target that we want to start a transaction +    serial_output(); +    serial_low(); +    _delay_us(SLAVE_INT_WIDTH_US); + +    // send transaction table index +    int tid = (sstd_index << 3) | (7 & nibble_bits_count(sstd_index)); +    sync_send(); +    _delay_sub_us(TID_SEND_ADJUST); +    serial_write_chunk(tid, 8); +    serial_delay_half1(); + +    // wait for the target response (step1 low->high) +    serial_input_with_pullup(); +    while (!serial_read_pin()) { +        _delay_sub_us(2); +    } + +    // check if the target is present (step2 high->low) +    for (int i = 0; serial_read_pin(); i++) { +        if (i > SLAVE_INT_ACK_WIDTH + 1) { +            // slave failed to pull the line low, assume not present +            serial_output(); +            serial_high(); +            *trans->status = TRANSACTION_NO_RESPONSE; +            sei(); +            return TRANSACTION_NO_RESPONSE; +        } +        _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT); +    } + +    // initiator recive phase +    // if the target is present syncronize with it +    if (trans->target2initiator_buffer_size > 0) { +        if (!serial_recive_packet((uint8_t *)split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) { +            serial_output(); +            serial_high(); +            *trans->status = TRANSACTION_DATA_ERROR; +            sei(); +            return TRANSACTION_DATA_ERROR; +        } +    } + +    // initiator switch to output +    change_reciver2sender(); + +    // initiator send phase +    if (trans->initiator2target_buffer_size > 0) { +        serial_send_packet((uint8_t *)split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size); +    } + +    // always, release the line when not in use +    sync_send(); + +    *trans->status = TRANSACTION_END; +    sei(); +    return TRANSACTION_END; +} + +int soft_serial_get_and_clean_status(int sstd_index) { +    split_transaction_desc_t *trans = &split_transaction_table[sstd_index]; +    cli(); +    int retval     = *trans->status; +    *trans->status = 0; +    ; +    sei(); +    return retval; +} +#endif + +// Helix serial.c history +//   2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc) +//   2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4) +//             (adjusted with avr-gcc 4.9.2) +//   2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78) +//             (adjusted with avr-gcc 4.9.2) +//   2018-8-11 add support multi-type transaction (#3608, feb5e4aae) +//             (adjusted with avr-gcc 4.9.2) +//   2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff) +//             (adjusted with avr-gcc 7.3.0) +//   2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66) +//             (adjusted with avr-gcc 5.4.0, 7.3.0) +//   2018-12-17 copy to TOP/quantum/split_common/ and remove backward compatibility code (#4669) diff --git a/platforms/avr/drivers/spi_master.c b/platforms/avr/drivers/spi_master.c new file mode 100644 index 0000000000..4e8fd3bcdf --- /dev/null +++ b/platforms/avr/drivers/spi_master.c @@ -0,0 +1,180 @@ +/*  Copyright 2020 + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ + +#include "spi_master.h" + +#include "timer.h" + +#if defined(__AVR_AT90USB162__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) +#    define SPI_SCK_PIN B1 +#    define SPI_MOSI_PIN B2 +#    define SPI_MISO_PIN B3 +#elif defined(__AVR_ATmega32A__) +#    define SPI_SCK_PIN B7 +#    define SPI_MOSI_PIN B5 +#    define SPI_MISO_PIN B6 +#elif defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328__) +#    define SPI_SCK_PIN B5 +#    define SPI_MOSI_PIN B3 +#    define SPI_MISO_PIN B4 +#endif + +#ifndef SPI_TIMEOUT +#    define SPI_TIMEOUT 100 +#endif + +static pin_t   currentSlavePin    = NO_PIN; +static uint8_t currentSlaveConfig = 0; +static bool    currentSlave2X     = false; + +void spi_init(void) { +    writePinHigh(SPI_SS_PIN); +    setPinOutput(SPI_SCK_PIN); +    setPinOutput(SPI_MOSI_PIN); +    setPinInput(SPI_MISO_PIN); + +    SPCR = (_BV(SPE) | _BV(MSTR)); +} + +bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { +    if (currentSlavePin != NO_PIN || slavePin == NO_PIN) { +        return false; +    } + +    currentSlaveConfig = 0; + +    if (lsbFirst) { +        currentSlaveConfig |= _BV(DORD); +    } + +    switch (mode) { +        case 1: +            currentSlaveConfig |= _BV(CPHA); +            break; +        case 2: +            currentSlaveConfig |= _BV(CPOL); +            break; +        case 3: +            currentSlaveConfig |= (_BV(CPOL) | _BV(CPHA)); +            break; +    } + +    uint16_t roundedDivisor = 1; +    while (roundedDivisor < divisor) { +        roundedDivisor <<= 1; +    } + +    switch (roundedDivisor) { +        case 16: +            currentSlaveConfig |= _BV(SPR0); +            break; +        case 64: +            currentSlaveConfig |= _BV(SPR1); +            break; +        case 128: +            currentSlaveConfig |= (_BV(SPR1) | _BV(SPR0)); +            break; +        case 2: +            currentSlave2X = true; +            break; +        case 8: +            currentSlave2X = true; +            currentSlaveConfig |= _BV(SPR0); +            break; +        case 32: +            currentSlave2X = true; +            currentSlaveConfig |= _BV(SPR1); +            break; +    } + +    SPCR |= currentSlaveConfig; +    if (currentSlave2X) { +        SPSR |= _BV(SPI2X); +    } +    currentSlavePin = slavePin; +    setPinOutput(currentSlavePin); +    writePinLow(currentSlavePin); + +    return true; +} + +spi_status_t spi_write(uint8_t data) { +    SPDR = data; + +    uint16_t timeout_timer = timer_read(); +    while (!(SPSR & _BV(SPIF))) { +        if ((timer_read() - timeout_timer) >= SPI_TIMEOUT) { +            return SPI_STATUS_TIMEOUT; +        } +    } + +    return SPDR; +} + +spi_status_t spi_read() { +    SPDR = 0x00;  // Dummy + +    uint16_t timeout_timer = timer_read(); +    while (!(SPSR & _BV(SPIF))) { +        if ((timer_read() - timeout_timer) >= SPI_TIMEOUT) { +            return SPI_STATUS_TIMEOUT; +        } +    } + +    return SPDR; +} + +spi_status_t spi_transmit(const uint8_t *data, uint16_t length) { +    spi_status_t status; + +    for (uint16_t i = 0; i < length; i++) { +        status = spi_write(data[i]); + +        if (status < 0) { +            return status; +        } +    } + +    return SPI_STATUS_SUCCESS; +} + +spi_status_t spi_receive(uint8_t *data, uint16_t length) { +    spi_status_t status; + +    for (uint16_t i = 0; i < length; i++) { +        status = spi_read(); + +        if (status >= 0) { +            data[i] = status; +        } else { +            return status; +        } +    } + +    return SPI_STATUS_SUCCESS; +} + +void spi_stop(void) { +    if (currentSlavePin != NO_PIN) { +        setPinOutput(currentSlavePin); +        writePinHigh(currentSlavePin); +        currentSlavePin = NO_PIN; +        SPSR &= ~(_BV(SPI2X)); +        SPCR &= ~(currentSlaveConfig); +        currentSlaveConfig = 0; +        currentSlave2X     = false; +    } +} diff --git a/platforms/avr/drivers/spi_master.h b/platforms/avr/drivers/spi_master.h new file mode 100644 index 0000000000..8a30f47ae4 --- /dev/null +++ b/platforms/avr/drivers/spi_master.h @@ -0,0 +1,59 @@ +/*  Copyright 2020 + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdbool.h> + +#include "gpio.h" + +typedef int16_t spi_status_t; + +// Hardware SS pin is defined in the header so that user code can refer to it +#if defined(__AVR_AT90USB162__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) +#    define SPI_SS_PIN B0 +#elif defined(__AVR_ATmega32A__) +#    define SPI_SS_PIN B4 +#elif defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328__) +#    define SPI_SS_PIN B2 +#endif + +#define SPI_STATUS_SUCCESS (0) +#define SPI_STATUS_ERROR (-1) +#define SPI_STATUS_TIMEOUT (-2) + +#define SPI_TIMEOUT_IMMEDIATE (0) +#define SPI_TIMEOUT_INFINITE (0xFFFF) + +#ifdef __cplusplus +extern "C" { +#endif +void spi_init(void); + +bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor); + +spi_status_t spi_write(uint8_t data); + +spi_status_t spi_read(void); + +spi_status_t spi_transmit(const uint8_t *data, uint16_t length); + +spi_status_t spi_receive(uint8_t *data, uint16_t length); + +void spi_stop(void); +#ifdef __cplusplus +} +#endif diff --git a/platforms/avr/drivers/ssd1306.c b/platforms/avr/drivers/ssd1306.c new file mode 100644 index 0000000000..1a09a2bcb7 --- /dev/null +++ b/platforms/avr/drivers/ssd1306.c @@ -0,0 +1,319 @@ +#ifdef SSD1306OLED + +#    include "ssd1306.h" +#    include "i2c.h" +#    include <string.h> +#    include "print.h" +#    include "glcdfont.c" +#    ifdef PROTOCOL_LUFA +#        include "lufa.h" +#    endif +#    include "sendchar.h" +#    include "timer.h" + +struct CharacterMatrix display; + +// Set this to 1 to help diagnose early startup problems +// when testing power-on with ble.  Turn it off otherwise, +// as the latency of printing most of the debug info messes +// with the matrix scan, causing keys to drop. +#    define DEBUG_TO_SCREEN 0 + +// static uint16_t last_battery_update; +// static uint32_t vbat; +//#define BatteryUpdateInterval 10000 /* milliseconds */ +#    define ScreenOffInterval 300000 /* milliseconds */ +#    if DEBUG_TO_SCREEN +static uint8_t displaying; +#    endif +static uint16_t last_flush; + +// Write command sequence. +// Returns true on success. +static inline bool _send_cmd1(uint8_t cmd) { +    bool res = false; + +    if (i2c_start_write(SSD1306_ADDRESS)) { +        xprintf("failed to start write to %d\n", SSD1306_ADDRESS); +        goto done; +    } + +    if (i2c_master_write(0x0 /* command byte follows */)) { +        print("failed to write control byte\n"); + +        goto done; +    } + +    if (i2c_master_write(cmd)) { +        xprintf("failed to write command %d\n", cmd); +        goto done; +    } +    res = true; +done: +    i2c_master_stop(); +    return res; +} + +// Write 2-byte command sequence. +// Returns true on success +static inline bool _send_cmd2(uint8_t cmd, uint8_t opr) { +    if (!_send_cmd1(cmd)) { +        return false; +    } +    return _send_cmd1(opr); +} + +// Write 3-byte command sequence. +// Returns true on success +static inline bool _send_cmd3(uint8_t cmd, uint8_t opr1, uint8_t opr2) { +    if (!_send_cmd1(cmd)) { +        return false; +    } +    if (!_send_cmd1(opr1)) { +        return false; +    } +    return _send_cmd1(opr2); +} + +#    define send_cmd1(c)      \ +        if (!_send_cmd1(c)) { \ +            goto done;        \ +        } +#    define send_cmd2(c, o)      \ +        if (!_send_cmd2(c, o)) { \ +            goto done;           \ +        } +#    define send_cmd3(c, o1, o2)      \ +        if (!_send_cmd3(c, o1, o2)) { \ +            goto done;                \ +        } + +static void clear_display(void) { +    matrix_clear(&display); + +    // Clear all of the display bits (there can be random noise +    // in the RAM on startup) +    send_cmd3(PageAddr, 0, (DisplayHeight / 8) - 1); +    send_cmd3(ColumnAddr, 0, DisplayWidth - 1); + +    if (i2c_start_write(SSD1306_ADDRESS)) { +        goto done; +    } +    if (i2c_master_write(0x40)) { +        // Data mode +        goto done; +    } +    for (uint8_t row = 0; row < MatrixRows; ++row) { +        for (uint8_t col = 0; col < DisplayWidth; ++col) { +            i2c_master_write(0); +        } +    } + +    display.dirty = false; + +done: +    i2c_master_stop(); +} + +#    if DEBUG_TO_SCREEN +#        undef sendchar +static int8_t capture_sendchar(uint8_t c) { +    sendchar(c); +    iota_gfx_write_char(c); + +    if (!displaying) { +        iota_gfx_flush(); +    } +    return 0; +} +#    endif + +bool iota_gfx_init(void) { +    bool success = false; + +    send_cmd1(DisplayOff); +    send_cmd2(SetDisplayClockDiv, 0x80); +    send_cmd2(SetMultiPlex, DisplayHeight - 1); + +    send_cmd2(SetDisplayOffset, 0); + +    send_cmd1(SetStartLine | 0x0); +    send_cmd2(SetChargePump, 0x14 /* Enable */); +    send_cmd2(SetMemoryMode, 0 /* horizontal addressing */); + +#    ifdef OLED_ROTATE180 +    // the following Flip the display orientation 180 degrees +    send_cmd1(SegRemap); +    send_cmd1(ComScanInc); +#    endif +#    ifndef OLED_ROTATE180 +    // Flips the display orientation 0 degrees +    send_cmd1(SegRemap | 0x1); +    send_cmd1(ComScanDec); +#    endif + +    send_cmd2(SetComPins, 0x2); +    send_cmd2(SetContrast, 0x8f); +    send_cmd2(SetPreCharge, 0xf1); +    send_cmd2(SetVComDetect, 0x40); +    send_cmd1(DisplayAllOnResume); +    send_cmd1(NormalDisplay); +    send_cmd1(DeActivateScroll); +    send_cmd1(DisplayOn); + +    send_cmd2(SetContrast, 0);  // Dim + +    clear_display(); + +    success = true; + +    iota_gfx_flush(); + +#    if DEBUG_TO_SCREEN +    print_set_sendchar(capture_sendchar); +#    endif + +done: +    return success; +} + +bool iota_gfx_off(void) { +    bool success = false; + +    send_cmd1(DisplayOff); +    success = true; + +done: +    return success; +} + +bool iota_gfx_on(void) { +    bool success = false; + +    send_cmd1(DisplayOn); +    success = true; + +done: +    return success; +} + +void matrix_write_char_inner(struct CharacterMatrix *matrix, uint8_t c) { +    *matrix->cursor = c; +    ++matrix->cursor; + +    if (matrix->cursor - &matrix->display[0][0] == sizeof(matrix->display)) { +        // We went off the end; scroll the display upwards by one line +        memmove(&matrix->display[0], &matrix->display[1], MatrixCols * (MatrixRows - 1)); +        matrix->cursor = &matrix->display[MatrixRows - 1][0]; +        memset(matrix->cursor, ' ', MatrixCols); +    } +} + +void matrix_write_char(struct CharacterMatrix *matrix, uint8_t c) { +    matrix->dirty = true; + +    if (c == '\n') { +        // Clear to end of line from the cursor and then move to the +        // start of the next line +        uint8_t cursor_col = (matrix->cursor - &matrix->display[0][0]) % MatrixCols; + +        while (cursor_col++ < MatrixCols) { +            matrix_write_char_inner(matrix, ' '); +        } +        return; +    } + +    matrix_write_char_inner(matrix, c); +} + +void iota_gfx_write_char(uint8_t c) { matrix_write_char(&display, c); } + +void matrix_write(struct CharacterMatrix *matrix, const char *data) { +    const char *end = data + strlen(data); +    while (data < end) { +        matrix_write_char(matrix, *data); +        ++data; +    } +} + +void iota_gfx_write(const char *data) { matrix_write(&display, data); } + +void matrix_write_P(struct CharacterMatrix *matrix, const char *data) { +    while (true) { +        uint8_t c = pgm_read_byte(data); +        if (c == 0) { +            return; +        } +        matrix_write_char(matrix, c); +        ++data; +    } +} + +void iota_gfx_write_P(const char *data) { matrix_write_P(&display, data); } + +void matrix_clear(struct CharacterMatrix *matrix) { +    memset(matrix->display, ' ', sizeof(matrix->display)); +    matrix->cursor = &matrix->display[0][0]; +    matrix->dirty  = true; +} + +void iota_gfx_clear_screen(void) { matrix_clear(&display); } + +void matrix_render(struct CharacterMatrix *matrix) { +    last_flush = timer_read(); +    iota_gfx_on(); +#    if DEBUG_TO_SCREEN +    ++displaying; +#    endif + +    // Move to the home position +    send_cmd3(PageAddr, 0, MatrixRows - 1); +    send_cmd3(ColumnAddr, 0, (MatrixCols * FontWidth) - 1); + +    if (i2c_start_write(SSD1306_ADDRESS)) { +        goto done; +    } +    if (i2c_master_write(0x40)) { +        // Data mode +        goto done; +    } + +    for (uint8_t row = 0; row < MatrixRows; ++row) { +        for (uint8_t col = 0; col < MatrixCols; ++col) { +            const uint8_t *glyph = font + (matrix->display[row][col] * (FontWidth - 1)); + +            for (uint8_t glyphCol = 0; glyphCol < FontWidth - 1; ++glyphCol) { +                uint8_t colBits = pgm_read_byte(glyph + glyphCol); +                i2c_master_write(colBits); +            } + +            // 1 column of space between chars (it's not included in the glyph) +            i2c_master_write(0); +        } +    } + +    matrix->dirty = false; + +done: +    i2c_master_stop(); +#    if DEBUG_TO_SCREEN +    --displaying; +#    endif +} + +void iota_gfx_flush(void) { matrix_render(&display); } + +__attribute__((weak)) void iota_gfx_task_user(void) {} + +void iota_gfx_task(void) { +    iota_gfx_task_user(); + +    if (display.dirty) { +        iota_gfx_flush(); +    } + +    if (timer_elapsed(last_flush) > ScreenOffInterval) { +        iota_gfx_off(); +    } +} +#endif diff --git a/platforms/avr/drivers/ssd1306.h b/platforms/avr/drivers/ssd1306.h new file mode 100644 index 0000000000..6eecdcfaa4 --- /dev/null +++ b/platforms/avr/drivers/ssd1306.h @@ -0,0 +1,87 @@ +#pragma once + +#include <stdbool.h> +#include <stdio.h> +#include "config.h" + +enum ssd1306_cmds { +    DisplayOff = 0xAE, +    DisplayOn  = 0xAF, + +    SetContrast        = 0x81, +    DisplayAllOnResume = 0xA4, + +    DisplayAllOn       = 0xA5, +    NormalDisplay      = 0xA6, +    InvertDisplay      = 0xA7, +    SetDisplayOffset   = 0xD3, +    SetComPins         = 0xda, +    SetVComDetect      = 0xdb, +    SetDisplayClockDiv = 0xD5, +    SetPreCharge       = 0xd9, +    SetMultiPlex       = 0xa8, +    SetLowColumn       = 0x00, +    SetHighColumn      = 0x10, +    SetStartLine       = 0x40, + +    SetMemoryMode = 0x20, +    ColumnAddr    = 0x21, +    PageAddr      = 0x22, + +    ComScanInc    = 0xc0, +    ComScanDec    = 0xc8, +    SegRemap      = 0xa0, +    SetChargePump = 0x8d, +    ExternalVcc   = 0x01, +    SwitchCapVcc  = 0x02, + +    ActivateScroll                   = 0x2f, +    DeActivateScroll                 = 0x2e, +    SetVerticalScrollArea            = 0xa3, +    RightHorizontalScroll            = 0x26, +    LeftHorizontalScroll             = 0x27, +    VerticalAndRightHorizontalScroll = 0x29, +    VerticalAndLeftHorizontalScroll  = 0x2a, +}; + +// Controls the SSD1306 128x32 OLED display via i2c + +#ifndef SSD1306_ADDRESS +#    define SSD1306_ADDRESS 0x3C +#endif + +#define DisplayHeight 32 +#define DisplayWidth 128 + +#define FontHeight 8 +#define FontWidth 6 + +#define MatrixRows (DisplayHeight / FontHeight) +#define MatrixCols (DisplayWidth / FontWidth) + +struct CharacterMatrix { +    uint8_t  display[MatrixRows][MatrixCols]; +    uint8_t *cursor; +    bool     dirty; +}; + +extern struct CharacterMatrix display; + +bool iota_gfx_init(void); +void iota_gfx_task(void); +bool iota_gfx_off(void); +bool iota_gfx_on(void); +void iota_gfx_flush(void); +void iota_gfx_write_char(uint8_t c); +void iota_gfx_write(const char *data); +void iota_gfx_write_P(const char *data); +void iota_gfx_clear_screen(void); + +void iota_gfx_task_user(void); + +void matrix_clear(struct CharacterMatrix *matrix); +void matrix_write_char_inner(struct CharacterMatrix *matrix, uint8_t c); +void matrix_write_char(struct CharacterMatrix *matrix, uint8_t c); +void matrix_write(struct CharacterMatrix *matrix, const char *data); +void matrix_write_P(struct CharacterMatrix *matrix, const char *data); +void matrix_render(struct CharacterMatrix *matrix); diff --git a/platforms/avr/drivers/uart.c b/platforms/avr/drivers/uart.c new file mode 100644 index 0000000000..c6abcb6fe0 --- /dev/null +++ b/platforms/avr/drivers/uart.c @@ -0,0 +1,170 @@ +/* UART Example for Teensy USB Development Board + * http://www.pjrc.com/teensy/ + * Copyright (c) 2009 PJRC.COM, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// Version 1.0: Initial Release +// Version 1.1: Add support for Teensy 2.0, minor optimizations + +#include <avr/io.h> +#include <avr/interrupt.h> + +#include "uart.h" + +#if defined(__AVR_AT90USB162__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) +#    define UDRn UDR1 +#    define UBRRnL UBRR1L +#    define UCSRnA UCSR1A +#    define UCSRnB UCSR1B +#    define UCSRnC UCSR1C +#    define U2Xn U2X1 +#    define RXENn RXEN1 +#    define TXENn TXEN1 +#    define RXCIEn RXCIE1 +#    define UCSZn1 UCSZ11 +#    define UCSZn0 UCSZ10 +#    define UDRIEn UDRIE1 +#    define USARTn_UDRE_vect USART1_UDRE_vect +#    define USARTn_RX_vect USART1_RX_vect +#elif defined(__AVR_ATmega32A__) +#    define UDRn UDR +#    define UBRRnL UBRRL +#    define UCSRnA UCSRA +#    define UCSRnB UCSRB +#    define UCSRnC UCSRC +#    define U2Xn U2X +#    define RXENn RXEN +#    define TXENn TXEN +#    define RXCIEn RXCIE +#    define UCSZn1 UCSZ1 +#    define UCSZn0 UCSZ0 +#    define UDRIEn UDRIE +#    define USARTn_UDRE_vect USART_UDRE_vect +#    define USARTn_RX_vect USART_RX_vect +#elif defined(__AVR_ATmega328__) || defined(__AVR_ATmega328P__) +#    define UDRn UDR0 +#    define UBRRnL UBRR0L +#    define UCSRnA UCSR0A +#    define UCSRnB UCSR0B +#    define UCSRnC UCSR0C +#    define U2Xn U2X0 +#    define RXENn RXEN0 +#    define TXENn TXEN0 +#    define RXCIEn RXCIE0 +#    define UCSZn1 UCSZ01 +#    define UCSZn0 UCSZ00 +#    define UDRIEn UDRIE0 +#    define USARTn_UDRE_vect USART_UDRE_vect +#    define USARTn_RX_vect USART_RX_vect +#endif + +// These buffers may be any size from 2 to 256 bytes. +#define RX_BUFFER_SIZE 64 +#define TX_BUFFER_SIZE 256 + +static volatile uint8_t tx_buffer[TX_BUFFER_SIZE]; +static volatile uint8_t tx_buffer_head; +static volatile uint8_t tx_buffer_tail; +static volatile uint8_t rx_buffer[RX_BUFFER_SIZE]; +static volatile uint8_t rx_buffer_head; +static volatile uint8_t rx_buffer_tail; + +// Initialize the UART +void uart_init(uint32_t baud) { +    cli(); +    UBRRnL         = (F_CPU / 4 / baud - 1) / 2; +    UCSRnA         = (1 << U2Xn); +    UCSRnB         = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn); +    UCSRnC         = (1 << UCSZn1) | (1 << UCSZn0); +    tx_buffer_head = tx_buffer_tail = 0; +    rx_buffer_head = rx_buffer_tail = 0; +    sei(); +} + +// Transmit a byte +void uart_putchar(uint8_t c) { +    uint8_t i; + +    i = tx_buffer_head + 1; +    if (i >= TX_BUFFER_SIZE) i = 0; +    // return immediately to avoid deadlock when interrupt is disabled(called from ISR) +    if (tx_buffer_tail == i && (SREG & (1 << SREG_I)) == 0) return; +    while (tx_buffer_tail == i) +        ;  // wait until space in buffer +    // cli(); +    tx_buffer[i]   = c; +    tx_buffer_head = i; +    UCSRnB         = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn) | (1 << UDRIEn); +    // sei(); +} + +// Receive a byte +uint8_t uart_getchar(void) { +    uint8_t c, i; + +    while (rx_buffer_head == rx_buffer_tail) +        ;  // wait for character +    i = rx_buffer_tail + 1; +    if (i >= RX_BUFFER_SIZE) i = 0; +    c              = rx_buffer[i]; +    rx_buffer_tail = i; +    return c; +} + +// Return whether the number of bytes waiting in the receive buffer is nonzero. +// Call this before uart_getchar() to check if it will need +// to wait for a byte to arrive. +bool uart_available(void) { +    uint8_t head, tail; + +    head = rx_buffer_head; +    tail = rx_buffer_tail; +    if (head >= tail) return (head - tail) > 0; +    return (RX_BUFFER_SIZE + head - tail) > 0; +} + +// Transmit Interrupt +ISR(USARTn_UDRE_vect) { +    uint8_t i; + +    if (tx_buffer_head == tx_buffer_tail) { +        // buffer is empty, disable transmit interrupt +        UCSRnB = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn); +    } else { +        i = tx_buffer_tail + 1; +        if (i >= TX_BUFFER_SIZE) i = 0; +        UDRn           = tx_buffer[i]; +        tx_buffer_tail = i; +    } +} + +// Receive Interrupt +ISR(USARTn_RX_vect) { +    uint8_t c, i; + +    c = UDRn; +    i = rx_buffer_head + 1; +    if (i >= RX_BUFFER_SIZE) i = 0; +    if (i != rx_buffer_tail) { +        rx_buffer[i]   = c; +        rx_buffer_head = i; +    } +} diff --git a/platforms/avr/drivers/uart.h b/platforms/avr/drivers/uart.h new file mode 100644 index 0000000000..602eb3d8b0 --- /dev/null +++ b/platforms/avr/drivers/uart.h @@ -0,0 +1,35 @@ +/* UART Example for Teensy USB Development Board + * http://www.pjrc.com/teensy/ + * Copyright (c) 2009 PJRC.COM, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> + +void uart_init(uint32_t baud); + +void uart_putchar(uint8_t c); + +uint8_t uart_getchar(void); + +bool uart_available(void); diff --git a/platforms/avr/drivers/ws2812.c b/platforms/avr/drivers/ws2812.c new file mode 100644 index 0000000000..77c492cd4c --- /dev/null +++ b/platforms/avr/drivers/ws2812.c @@ -0,0 +1,176 @@ +/* + * light weight WS2812 lib V2.0b + * + * Controls WS2811/WS2812/WS2812B RGB-LEDs + * Author: Tim ([email protected]) + * + * Jan 18th, 2014  v2.0b Initial Version + * Nov 29th, 2015  v2.3  Added SK6812RGBW support + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include "ws2812.h" +#include <avr/interrupt.h> +#include <avr/io.h> +#include <util/delay.h> + +#define pinmask(pin) (_BV((pin)&0xF)) + +/* + * Forward declare internal functions + * + * The functions take a byte-array and send to the data output as WS2812 bitstream. + * The length is the number of bytes to send - three per LED. + */ + +static inline void ws2812_sendarray_mask(uint8_t *data, uint16_t datlen, uint8_t masklo, uint8_t maskhi); + +void ws2812_setleds(LED_TYPE *ledarray, uint16_t number_of_leds) { +    DDRx_ADDRESS(RGB_DI_PIN) |= pinmask(RGB_DI_PIN); + +    uint8_t masklo = ~(pinmask(RGB_DI_PIN)) & PORTx_ADDRESS(RGB_DI_PIN); +    uint8_t maskhi = pinmask(RGB_DI_PIN) | PORTx_ADDRESS(RGB_DI_PIN); + +    ws2812_sendarray_mask((uint8_t *)ledarray, number_of_leds * sizeof(LED_TYPE), masklo, maskhi); + +    _delay_us(WS2812_TRST_US); +} + +/* +  This routine writes an array of bytes with RGB values to the Dataout pin +  using the fast 800kHz clockless WS2811/2812 protocol. +*/ + +// Timing in ns +#define w_zeropulse 350 +#define w_onepulse 900 +#define w_totalperiod 1250 + +// Fixed cycles used by the inner loop +#define w_fixedlow 2 +#define w_fixedhigh 4 +#define w_fixedtotal 8 + +// Insert NOPs to match the timing, if possible +#define w_zerocycles (((F_CPU / 1000) * w_zeropulse) / 1000000) +#define w_onecycles (((F_CPU / 1000) * w_onepulse + 500000) / 1000000) +#define w_totalcycles (((F_CPU / 1000) * w_totalperiod + 500000) / 1000000) + +// w1_nops - nops between rising edge and falling edge - low +#if w_zerocycles >= w_fixedlow +#    define w1_nops (w_zerocycles - w_fixedlow) +#else +#    define w1_nops 0 +#endif + +// w2_nops - nops between fe low and fe high +#if w_onecycles >= (w_fixedhigh + w1_nops) +#    define w2_nops (w_onecycles - w_fixedhigh - w1_nops) +#else +#    define w2_nops 0 +#endif + +// w3_nops - nops to complete loop +#if w_totalcycles >= (w_fixedtotal + w1_nops + w2_nops) +#    define w3_nops (w_totalcycles - w_fixedtotal - w1_nops - w2_nops) +#else +#    define w3_nops 0 +#endif + +// The only critical timing parameter is the minimum pulse length of the "0" +// Warn or throw error if this timing can not be met with current F_CPU settings. +#define w_lowtime ((w1_nops + w_fixedlow) * 1000000) / (F_CPU / 1000) +#if w_lowtime > 550 +#    error "Light_ws2812: Sorry, the clock speed is too low. Did you set F_CPU correctly?" +#elif w_lowtime > 450 +#    warning "Light_ws2812: The timing is critical and may only work on WS2812B, not on WS2812(S)." +#    warning "Please consider a higher clockspeed, if possible" +#endif + +#define w_nop1 "nop      \n\t" +#define w_nop2 "rjmp .+0 \n\t" +#define w_nop4 w_nop2 w_nop2 +#define w_nop8 w_nop4 w_nop4 +#define w_nop16 w_nop8 w_nop8 + +static inline void ws2812_sendarray_mask(uint8_t *data, uint16_t datlen, uint8_t masklo, uint8_t maskhi) { +    uint8_t curbyte, ctr, sreg_prev; + +    sreg_prev = SREG; +    cli(); + +    while (datlen--) { +        curbyte = (*data++); + +        asm volatile("       ldi   %0,8  \n\t" +                     "loop%=:            \n\t" +                     "       out   %2,%3 \n\t"  //  '1' [01] '0' [01] - re +#if (w1_nops & 1) +                     w_nop1 +#endif +#if (w1_nops & 2) +                         w_nop2 +#endif +#if (w1_nops & 4) +                             w_nop4 +#endif +#if (w1_nops & 8) +                                 w_nop8 +#endif +#if (w1_nops & 16) +                                     w_nop16 +#endif +                     "       sbrs  %1,7  \n\t"  //  '1' [03] '0' [02] +                     "       out   %2,%4 \n\t"  //  '1' [--] '0' [03] - fe-low +                     "       lsl   %1    \n\t"  //  '1' [04] '0' [04] +#if (w2_nops & 1) +                     w_nop1 +#endif +#if (w2_nops & 2) +                         w_nop2 +#endif +#if (w2_nops & 4) +                             w_nop4 +#endif +#if (w2_nops & 8) +                                 w_nop8 +#endif +#if (w2_nops & 16) +                                     w_nop16 +#endif +                     "       out   %2,%4 \n\t"  //  '1' [+1] '0' [+1] - fe-high +#if (w3_nops & 1) +                     w_nop1 +#endif +#if (w3_nops & 2) +                         w_nop2 +#endif +#if (w3_nops & 4) +                             w_nop4 +#endif +#if (w3_nops & 8) +                                 w_nop8 +#endif +#if (w3_nops & 16) +                                     w_nop16 +#endif + +                     "       dec   %0    \n\t"  //  '1' [+2] '0' [+2] +                     "       brne  loop%=\n\t"  //  '1' [+3] '0' [+4] +                     : "=&d"(ctr) +                     : "r"(curbyte), "I"(_SFR_IO_ADDR(PORTx_ADDRESS(RGB_DI_PIN))), "r"(maskhi), "r"(masklo)); +    } + +    SREG = sreg_prev; +} diff --git a/platforms/avr/drivers/ws2812_i2c.c b/platforms/avr/drivers/ws2812_i2c.c new file mode 100644 index 0000000000..1c332e24b6 --- /dev/null +++ b/platforms/avr/drivers/ws2812_i2c.c @@ -0,0 +1,27 @@ +#include "ws2812.h" +#include "i2c_master.h" + +#ifdef RGBW +#    error "RGBW not supported" +#endif + +#ifndef WS2812_ADDRESS +#    define WS2812_ADDRESS 0xb0 +#endif + +#ifndef WS2812_TIMEOUT +#    define WS2812_TIMEOUT 100 +#endif + +void ws2812_init(void) { i2c_init(); } + +// Setleds for standard RGB +void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) { +    static bool s_init = false; +    if (!s_init) { +        ws2812_init(); +        s_init = true; +    } + +    i2c_transmit(WS2812_ADDRESS, (uint8_t *)ledarray, sizeof(LED_TYPE) * leds, WS2812_TIMEOUT); +} diff --git a/platforms/avr/flash.mk b/platforms/avr/flash.mk new file mode 100644 index 0000000000..8eef5fbb03 --- /dev/null +++ b/platforms/avr/flash.mk @@ -0,0 +1,179 @@ +# Hey Emacs, this is a -*- makefile -*- +############################################################################## +# Architecture or project specific options +# + +# Autodetect teensy loader +ifndef TEENSY_LOADER_CLI +	ifneq (, $(shell which teensy-loader-cli 2>/dev/null)) +		TEENSY_LOADER_CLI ?= teensy-loader-cli +	else +		TEENSY_LOADER_CLI ?= teensy_loader_cli +	endif +endif + +define EXEC_TEENSY +	$(TEENSY_LOADER_CLI) -mmcu=$(MCU) -w -v $(BUILD_DIR)/$(TARGET).hex +endef + +teensy: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	$(call EXEC_TEENSY) + +DFU_PROGRAMMER ?= dfu-programmer +GREP ?= grep + +define EXEC_DFU +	if [ "$(1)" ]; then \ +		echo "Flashing '$(1)' for EE_HANDS split keyboard support." ;\ +	fi; \ +	if ! $(DFU_PROGRAMMER) $(MCU) get bootloader-version >/dev/null 2>/dev/null; then\ +		printf "$(MSG_BOOTLOADER_NOT_FOUND_QUICK_RETRY)" ;\ +		sleep $(BOOTLOADER_RETRY_TIME) ;\ +		while ! $(DFU_PROGRAMMER) $(MCU) get bootloader-version >/dev/null 2>/dev/null; do\ +			printf "." ;\ +			sleep $(BOOTLOADER_RETRY_TIME) ;\ +		done ;\ +		printf "\n" ;\ +	fi; \ +	$(DFU_PROGRAMMER) $(MCU) get bootloader-version ;\ +	if $(DFU_PROGRAMMER) --version 2>&1 | $(GREP) -q 0.7 ; then\ +		$(DFU_PROGRAMMER) $(MCU) erase --force; \ +		if [ "$(1)" ]; then \ +			$(DFU_PROGRAMMER) $(MCU) flash --force --eeprom $(QUANTUM_PATH)/split_common/$(1);\ +		fi; \ +		$(DFU_PROGRAMMER) $(MCU) flash --force $(BUILD_DIR)/$(TARGET).hex;\ +	else \ +		$(DFU_PROGRAMMER) $(MCU) erase; \ +		if [ "$(1)" ]; then \ +			$(DFU_PROGRAMMER) $(MCU) flash-eeprom $(QUANTUM_PATH)/split_common/$(1);\ +		fi; \ +		$(DFU_PROGRAMMER) $(MCU) flash $(BUILD_DIR)/$(TARGET).hex;\ +	fi; \ +	$(DFU_PROGRAMMER) $(MCU) reset +endef + +dfu: $(BUILD_DIR)/$(TARGET).hex cpfirmware check-size +	$(call EXEC_DFU) + +dfu-start: +	$(DFU_PROGRAMMER) $(MCU) reset +	$(DFU_PROGRAMMER) $(MCU) start + +dfu-ee: $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).eep +	if $(DFU_PROGRAMMER) --version 2>&1 | $(GREP) -q 0.7 ; then\ +		$(DFU_PROGRAMMER) $(MCU) flash --force --eeprom $(BUILD_DIR)/$(TARGET).eep;\ +	else\ +		$(DFU_PROGRAMMER) $(MCU) flash-eeprom $(BUILD_DIR)/$(TARGET).eep;\ +	fi +	$(DFU_PROGRAMMER) $(MCU) reset + +dfu-split-left: $(BUILD_DIR)/$(TARGET).hex cpfirmware check-size +	$(call EXEC_DFU,eeprom-lefthand.eep) + +dfu-split-right: $(BUILD_DIR)/$(TARGET).hex cpfirmware check-size +	$(call EXEC_DFU,eeprom-righthand.eep) + +AVRDUDE_PROGRAMMER ?= avrdude + +define EXEC_AVRDUDE +	list_devices() { \ +		if $(GREP) -q -s icrosoft /proc/version; then \ +		    wmic.exe path Win32_SerialPort get DeviceID 2>/dev/null | LANG=C perl -pne 's/COM(\d+)/COM.($$1-1)/e' | sed 's!COM!/dev/ttyS!' | xargs echo -n | sort; \ +		elif [ "`uname`" = "FreeBSD" ]; then \ +			ls /dev/tty* | grep -v '\.lock$$' | grep -v '\.init$$'; \ +		else \ +			ls /dev/tty*; \ +		fi; \ +	}; \ +	USB= ;\ +	printf "Waiting for USB serial port - reset your controller now (Ctrl+C to cancel)"; \ +	TMP1=`mktemp`; \ +	TMP2=`mktemp`; \ +	list_devices > $$TMP1; \ +	while [ -z "$$USB" ]; do \ +		sleep $(BOOTLOADER_RETRY_TIME); \ +		printf "."; \ +		list_devices > $$TMP2; \ +		USB=`comm -13 $$TMP1 $$TMP2 | $(GREP) -o '/dev/tty.*'`; \ +		mv $$TMP2 $$TMP1; \ +	done; \ +	rm $$TMP1; \ +	echo ""; \ +	echo "Device $$USB has appeared; assuming it is the controller."; \ +	if $(GREP) -q -s 'MINGW\|MSYS\|icrosoft' /proc/version; then \ +		USB=`echo "$$USB" | LANG=C perl -pne 's/\/dev\/ttyS(\d+)/COM.($$1+1)/e'`; \ +		echo "Remapped USB port to $$USB"; \ +		sleep 1; \ +	else \ +		printf "Waiting for $$USB to become writable."; \ +		while [ ! -w "$$USB" ]; do sleep $(BOOTLOADER_RETRY_TIME); printf "."; done; echo ""; \ +	fi; \ +	if [ -z "$(1)" ]; then \ +		$(AVRDUDE_PROGRAMMER) -p $(MCU) -c avr109 -P $$USB -U flash:w:$(BUILD_DIR)/$(TARGET).hex; \ +	else \ +		$(AVRDUDE_PROGRAMMER) -p $(MCU) -c avr109 -P $$USB -U flash:w:$(BUILD_DIR)/$(TARGET).hex -U eeprom:w:$(QUANTUM_PATH)/split_common/$(1); \ +	fi +endef + +avrdude: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	$(call EXEC_AVRDUDE) + +avrdude-loop: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	while true; do \ +		$(call EXEC_AVRDUDE) ; \ +	done + +avrdude-split-left: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	$(call EXEC_AVRDUDE,eeprom-lefthand.eep) + +avrdude-split-right: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	$(call EXEC_AVRDUDE,eeprom-righthand.eep) + +define EXEC_USBASP +	$(AVRDUDE_PROGRAMMER) -p $(AVRDUDE_MCU) -c usbasp -U flash:w:$(BUILD_DIR)/$(TARGET).hex +endef + +usbasp: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	$(call EXEC_USBASP) + +BOOTLOADHID_PROGRAMMER ?= bootloadHID + +define EXEC_BOOTLOADHID +	# bootloadHid executable has no cross platform detect methods +	# so keep running bootloadHid if the output contains "The specified device was not found" +	until $(BOOTLOADHID_PROGRAMMER) -r $(BUILD_DIR)/$(TARGET).hex 2>&1 | tee /dev/stderr | grep -v "device was not found"; do\ +		printf "$(MSG_BOOTLOADER_NOT_FOUND)" ;\ +		sleep 5 ;\ +	done +endef + +bootloadHID: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	$(call EXEC_BOOTLOADHID) + +HID_BOOTLOADER_CLI ?= hid_bootloader_cli + +define EXEC_HID_LUFA +	$(HID_BOOTLOADER_CLI) -mmcu=$(MCU) -w -v $(BUILD_DIR)/$(TARGET).hex +endef + +hid_bootloader: $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +	$(call EXEC_HID_LUFA) + +flash:  $(BUILD_DIR)/$(TARGET).hex check-size cpfirmware +ifneq ($(strip $(PROGRAM_CMD)),) +	$(UNSYNC_OUTPUT_CMD) && $(PROGRAM_CMD) +else ifeq ($(strip $(BOOTLOADER)), caterina) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_AVRDUDE) +else ifeq ($(strip $(BOOTLOADER)), halfkay) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_TEENSY) +else ifeq (dfu,$(findstring dfu,$(BOOTLOADER))) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU) +else ifeq ($(strip $(BOOTLOADER)), USBasp) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_USBASP) +else ifeq ($(strip $(BOOTLOADER)), bootloadHID) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_BOOTLOADHID) +else ifeq ($(strip $(BOOTLOADER)), qmk-hid) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_HID_LUFA) +else +	$(PRINT_OK); $(SILENT) || printf "$(MSG_FLASH_BOOTLOADER)" +endif diff --git a/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk b/platforms/chibios/boards/BLACKPILL_STM32_F401/board/board.mk index fddf7dace4..fddf7dace4 100644 --- a/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk +++ b/platforms/chibios/boards/BLACKPILL_STM32_F401/board/board.mk diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/board.h index 30af6b0c86..30af6b0c86 100644 --- a/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/board.h diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/bootloader_defs.h b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/bootloader_defs.h index 4da3d39a32..4da3d39a32 100644 --- a/platforms/chibios/BLACKPILL_STM32_F401/configs/bootloader_defs.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/bootloader_defs.h diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/config.h index e181422eba..e181422eba 100644 --- a/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/config.h diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h index ba6e934fe7..ba6e934fe7 100644 --- a/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h diff --git a/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk b/platforms/chibios/boards/BLACKPILL_STM32_F411/board/board.mk index bb00b1a2b0..bb00b1a2b0 100644 --- a/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/board/board.mk diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/board.h index 30af6b0c86..30af6b0c86 100644 --- a/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/board.h diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/bootloader_defs.h b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/bootloader_defs.h index 4da3d39a32..4da3d39a32 100644 --- a/platforms/chibios/BLACKPILL_STM32_F411/configs/bootloader_defs.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/bootloader_defs.h diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/config.h index e181422eba..e181422eba 100644 --- a/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/config.h diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h index 0394ff56bb..0394ff56bb 100644 --- a/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h diff --git a/platforms/chibios/BLACKPILL_STM32_F411/ld/STM32F411xC_tinyuf2.ld b/platforms/chibios/boards/BLACKPILL_STM32_F411/ld/STM32F411xC_tinyuf2.ld index 82253d3de5..82253d3de5 100644 --- a/platforms/chibios/BLACKPILL_STM32_F411/ld/STM32F411xC_tinyuf2.ld +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/ld/STM32F411xC_tinyuf2.ld diff --git a/platforms/chibios/BLACKPILL_STM32_F411/ld/STM32F411xE_tinyuf2.ld b/platforms/chibios/boards/BLACKPILL_STM32_F411/ld/STM32F411xE_tinyuf2.ld index 1656c67bf7..1656c67bf7 100644 --- a/platforms/chibios/BLACKPILL_STM32_F411/ld/STM32F411xE_tinyuf2.ld +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/ld/STM32F411xE_tinyuf2.ld diff --git a/platforms/chibios/GENERIC_STM32_F042X6/board/board.c b/platforms/chibios/boards/GENERIC_STM32_F042X6/board/board.c index 0d7c88756a..0d7c88756a 100644 --- a/platforms/chibios/GENERIC_STM32_F042X6/board/board.c +++ b/platforms/chibios/boards/GENERIC_STM32_F042X6/board/board.c diff --git a/platforms/chibios/GENERIC_STM32_F042X6/board/board.h b/platforms/chibios/boards/GENERIC_STM32_F042X6/board/board.h index ee9d31e04a..ee9d31e04a 100644 --- a/platforms/chibios/GENERIC_STM32_F042X6/board/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_F042X6/board/board.h diff --git a/platforms/chibios/GENERIC_STM32_F042X6/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_F042X6/board/board.mk index 842e335905..842e335905 100644 --- a/platforms/chibios/GENERIC_STM32_F042X6/board/board.mk +++ b/platforms/chibios/boards/GENERIC_STM32_F042X6/board/board.mk diff --git a/platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h b/platforms/chibios/boards/GENERIC_STM32_F042X6/configs/bootloader_defs.h index 25113425a6..25113425a6 100644 --- a/platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h +++ b/platforms/chibios/boards/GENERIC_STM32_F042X6/configs/bootloader_defs.h diff --git a/platforms/chibios/GENERIC_STM32_F042X6/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F042X6/configs/config.h index a73f0c0b47..a73f0c0b47 100644 --- a/platforms/chibios/GENERIC_STM32_F042X6/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_F042X6/configs/config.h diff --git a/platforms/chibios/GENERIC_STM32_F042X6/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F042X6/configs/mcuconf.h index 286e1230ce..286e1230ce 100644 --- a/platforms/chibios/GENERIC_STM32_F042X6/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F042X6/configs/mcuconf.h diff --git a/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_F072XB/board/board.mk index 3f0e6c46e8..3f0e6c46e8 100644 --- a/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk +++ b/platforms/chibios/boards/GENERIC_STM32_F072XB/board/board.mk diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/board.h index 30af6b0c86..30af6b0c86 100644 --- a/platforms/chibios/GENERIC_STM32_F072XB/configs/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/board.h diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/bootloader_defs.h index dccd0fa5d1..dccd0fa5d1 100644 --- a/platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h +++ b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/bootloader_defs.h diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/config.h index a73f0c0b47..a73f0c0b47 100644 --- a/platforms/chibios/GENERIC_STM32_F072XB/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/config.h diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h index 32b2777a81..32b2777a81 100644 --- a/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h diff --git a/platforms/chibios/GENERIC_STM32_F303XC/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_F303XC/board/board.mk index f891e65247..f891e65247 100644 --- a/platforms/chibios/GENERIC_STM32_F303XC/board/board.mk +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/board/board.mk diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/board.h index 97159964d0..97159964d0 100644 --- a/platforms/chibios/GENERIC_STM32_F303XC/configs/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/board.h diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/bootloader_defs.h index 87ac7b10dc..87ac7b10dc 100644 --- a/platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/bootloader_defs.h diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/config.h index a73f0c0b47..a73f0c0b47 100644 --- a/platforms/chibios/GENERIC_STM32_F303XC/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/config.h diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h index c6f5a8ac52..c6f5a8ac52 100644 --- a/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_F407XE/board/board.mk new file mode 100644 index 0000000000..6c837bb8ee --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.c + +# Required include directories +BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC  += $(BOARDINC)
\ No newline at end of file diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/board.h new file mode 100644 index 0000000000..22c4e4cd7e --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/board.h @@ -0,0 +1,24 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ +#pragma once + +#define STM32_HSECLK 8000000 +// The following is required to disable the pull-down on PA9, when PA9 is used for the keyboard matrix: +#define BOARD_OTG_NOVBUSSENS + +#include_next "board.h" + +#undef STM32_HSE_BYPASS
\ No newline at end of file diff --git a/platforms/chibios/GENERIC_STM32_F446XE/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/config.h index cc52a953ed..cc52a953ed 100644 --- a/platforms/chibios/GENERIC_STM32_F446XE/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/config.h diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h new file mode 100644 index 0000000000..4be47fe1b0 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h @@ -0,0 +1,355 @@ +/* +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0       Lowest...Highest. + * + * DMA priorities: + * 0...3        Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF +#define STM32F405_MCUCONF +#define STM32F415_MCUCONF +#define STM32F407_MCUCONF +#define STM32F417_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT                       FALSE +#define STM32_PVD_ENABLE                    FALSE +#define STM32_PLS                           STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE                 FALSE +#define STM32_HSI_ENABLED                   TRUE +#define STM32_LSI_ENABLED                   TRUE +#define STM32_HSE_ENABLED                   TRUE +#define STM32_LSE_ENABLED                   FALSE +#define STM32_CLOCK48_REQUIRED              TRUE +#define STM32_SW                            STM32_SW_PLL +#define STM32_PLLSRC                        STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE                    8 +#define STM32_PLLN_VALUE                    336 +#define STM32_PLLP_VALUE                    2 +#define STM32_PLLQ_VALUE                    7 +#define STM32_HPRE                          STM32_HPRE_DIV1 +#define STM32_PPRE1                         STM32_PPRE1_DIV4 +#define STM32_PPRE2                         STM32_PPRE2_DIV2 +#define STM32_RTCSEL                        STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE                  8 +#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI +#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC                        STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE                 192 +#define STM32_PLLI2SR_VALUE                 5 + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY            6 +#define STM32_IRQ_EXTI1_PRIORITY            6 +#define STM32_IRQ_EXTI2_PRIORITY            6 +#define STM32_IRQ_EXTI3_PRIORITY            6 +#define STM32_IRQ_EXTI4_PRIORITY            6 +#define STM32_IRQ_EXTI5_9_PRIORITY          6 +#define STM32_IRQ_EXTI10_15_PRIORITY        6 +#define STM32_IRQ_EXTI16_PRIORITY           6 +#define STM32_IRQ_EXTI17_PRIORITY           15 +#define STM32_IRQ_EXTI18_PRIORITY           6 +#define STM32_IRQ_EXTI19_PRIORITY           6 +#define STM32_IRQ_EXTI20_PRIORITY           6 +#define STM32_IRQ_EXTI21_PRIORITY           15 +#define STM32_IRQ_EXTI22_PRIORITY           15 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1                  FALSE +#define STM32_ADC_USE_ADC2                  FALSE +#define STM32_ADC_USE_ADC3                  FALSE +#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY         2 +#define STM32_ADC_ADC2_DMA_PRIORITY         2 +#define STM32_ADC_ADC3_DMA_PRIORITY         2 +#define STM32_ADC_IRQ_PRIORITY              6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1                  FALSE +#define STM32_CAN_USE_CAN2                  FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY         11 +#define STM32_CAN_CAN2_IRQ_PRIORITY         11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE                 FALSE +#define STM32_DAC_USE_DAC1_CH1              FALSE +#define STM32_DAC_USE_DAC1_CH2              FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5) +#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6) + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1                  FALSE +#define STM32_GPT_USE_TIM2                  FALSE +#define STM32_GPT_USE_TIM3                  FALSE +#define STM32_GPT_USE_TIM4                  FALSE +#define STM32_GPT_USE_TIM5                  FALSE +#define STM32_GPT_USE_TIM6                  FALSE +#define STM32_GPT_USE_TIM7                  FALSE +#define STM32_GPT_USE_TIM8                  FALSE +#define STM32_GPT_USE_TIM9                  FALSE +#define STM32_GPT_USE_TIM11                 FALSE +#define STM32_GPT_USE_TIM12                 FALSE +#define STM32_GPT_USE_TIM14                 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY         7 +#define STM32_GPT_TIM2_IRQ_PRIORITY         7 +#define STM32_GPT_TIM3_IRQ_PRIORITY         7 +#define STM32_GPT_TIM4_IRQ_PRIORITY         7 +#define STM32_GPT_TIM5_IRQ_PRIORITY         7 +#define STM32_GPT_TIM6_IRQ_PRIORITY         7 +#define STM32_GPT_TIM7_IRQ_PRIORITY         7 +#define STM32_GPT_TIM8_IRQ_PRIORITY         7 +#define STM32_GPT_TIM9_IRQ_PRIORITY         7 +#define STM32_GPT_TIM11_IRQ_PRIORITY        7 +#define STM32_GPT_TIM12_IRQ_PRIORITY        7 +#define STM32_GPT_TIM14_IRQ_PRIORITY        7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1                  FALSE +#define STM32_I2C_USE_I2C2                  FALSE +#define STM32_I2C_USE_I2C3                  FALSE +#define STM32_I2C_BUSY_TIMEOUT              50 +#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY         5 +#define STM32_I2C_I2C2_IRQ_PRIORITY         5 +#define STM32_I2C_I2C3_IRQ_PRIORITY         5 +#define STM32_I2C_I2C1_DMA_PRIORITY         3 +#define STM32_I2C_I2C2_DMA_PRIORITY         3 +#define STM32_I2C_I2C3_DMA_PRIORITY         3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2                  FALSE +#define STM32_I2S_USE_SPI3                  FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY         10 +#define STM32_I2S_SPI3_IRQ_PRIORITY         10 +#define STM32_I2S_SPI2_DMA_PRIORITY         1 +#define STM32_I2S_SPI3_DMA_PRIORITY         1 +#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1                  FALSE +#define STM32_ICU_USE_TIM2                  FALSE +#define STM32_ICU_USE_TIM3                  FALSE +#define STM32_ICU_USE_TIM4                  FALSE +#define STM32_ICU_USE_TIM5                  FALSE +#define STM32_ICU_USE_TIM8                  FALSE +#define STM32_ICU_USE_TIM9                  FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY         7 +#define STM32_ICU_TIM2_IRQ_PRIORITY         7 +#define STM32_ICU_TIM3_IRQ_PRIORITY         7 +#define STM32_ICU_TIM4_IRQ_PRIORITY         7 +#define STM32_ICU_TIM5_IRQ_PRIORITY         7 +#define STM32_ICU_TIM8_IRQ_PRIORITY         7 +#define STM32_ICU_TIM9_IRQ_PRIORITY         7 + +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS          2 +#define STM32_MAC_RECEIVE_BUFFERS           4 +#define STM32_MAC_BUFFERS_SIZE              1522 +#define STM32_MAC_PHY_TIMEOUT               100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY         13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED              FALSE +#define STM32_PWM_USE_TIM1                  FALSE +#define STM32_PWM_USE_TIM2                  FALSE +#define STM32_PWM_USE_TIM3                  FALSE +#define STM32_PWM_USE_TIM4                  FALSE +#define STM32_PWM_USE_TIM5                  FALSE +#define STM32_PWM_USE_TIM8                  FALSE +#define STM32_PWM_USE_TIM9                  FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY         7 +#define STM32_PWM_TIM2_IRQ_PRIORITY         7 +#define STM32_PWM_TIM3_IRQ_PRIORITY         7 +#define STM32_PWM_TIM4_IRQ_PRIORITY         7 +#define STM32_PWM_TIM5_IRQ_PRIORITY         7 +#define STM32_PWM_TIM8_IRQ_PRIORITY         7 +#define STM32_PWM_TIM9_IRQ_PRIORITY         7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE               32 +#define STM32_RTC_PRESS_VALUE               1024 +#define STM32_RTC_CR_INIT                   0 +#define STM32_RTC_TAMPCR_INIT               0 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_PRIORITY         3 +#define STM32_SDC_SDIO_IRQ_PRIORITY         9 +#define STM32_SDC_WRITE_TIMEOUT_MS          1000 +#define STM32_SDC_READ_TIMEOUT_MS           1000 +#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE +#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3) + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1             FALSE +#define STM32_SERIAL_USE_USART2             FALSE +#define STM32_SERIAL_USE_USART3             FALSE +#define STM32_SERIAL_USE_UART4              FALSE +#define STM32_SERIAL_USE_UART5              FALSE +#define STM32_SERIAL_USE_USART6             FALSE +#define STM32_SERIAL_USART1_PRIORITY        12 +#define STM32_SERIAL_USART2_PRIORITY        12 +#define STM32_SERIAL_USART3_PRIORITY        12 +#define STM32_SERIAL_UART4_PRIORITY         12 +#define STM32_SERIAL_UART5_PRIORITY         12 +#define STM32_SERIAL_USART6_PRIORITY        12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1                  FALSE +#define STM32_SPI_USE_SPI2                  FALSE +#define STM32_SPI_USE_SPI3                  FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY         1 +#define STM32_SPI_SPI2_DMA_PRIORITY         1 +#define STM32_SPI_SPI3_DMA_PRIORITY         1 +#define STM32_SPI_SPI1_IRQ_PRIORITY         10 +#define STM32_SPI_SPI2_IRQ_PRIORITY         10 +#define STM32_SPI_SPI3_IRQ_PRIORITY         10 +#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY               8 +#define STM32_ST_USE_TIMER                  2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1               FALSE +#define STM32_UART_USE_USART2               FALSE +#define STM32_UART_USE_USART3               FALSE +#define STM32_UART_USE_UART4                FALSE +#define STM32_UART_USE_UART5                FALSE +#define STM32_UART_USE_USART6               FALSE +#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7) +#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY      12 +#define STM32_UART_USART2_IRQ_PRIORITY      12 +#define STM32_UART_USART3_IRQ_PRIORITY      12 +#define STM32_UART_UART4_IRQ_PRIORITY       12 +#define STM32_UART_UART5_IRQ_PRIORITY       12 +#define STM32_UART_USART6_IRQ_PRIORITY      12 +#define STM32_UART_USART1_DMA_PRIORITY      0 +#define STM32_UART_USART2_DMA_PRIORITY      0 +#define STM32_UART_USART3_DMA_PRIORITY      0 +#define STM32_UART_UART4_DMA_PRIORITY       0 +#define STM32_UART_UART5_DMA_PRIORITY       0 +#define STM32_UART_USART6_DMA_PRIORITY      0 +#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1                  TRUE +#define STM32_USB_USE_OTG2                  FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY         14 +#define STM32_USB_OTG2_IRQ_PRIORITY         14 +#define STM32_USB_OTG1_RX_FIFO_SIZE         512 +#define STM32_USB_OTG2_RX_FIFO_SIZE         1024 +#define STM32_USB_HOST_WAKEUP_DURATION      2 + +#define STM32_USB_OTG_THREAD_PRIO           NORMALPRIO+1 +#define STM32_USB_OTG_THREAD_STACK_SIZE     128 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG                  FALSE + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/GENERIC_STM32_F446XE/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_F446XE/board/board.mk index 57897941ca..57897941ca 100644 --- a/platforms/chibios/GENERIC_STM32_F446XE/board/board.mk +++ b/platforms/chibios/boards/GENERIC_STM32_F446XE/board/board.mk diff --git a/platforms/chibios/GENERIC_STM32_F446XE/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/board.h index 80dfcffa99..80dfcffa99 100644 --- a/platforms/chibios/GENERIC_STM32_F446XE/configs/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/board.h diff --git a/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/config.h new file mode 100644 index 0000000000..cc52a953ed --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/config.h @@ -0,0 +1,23 @@ +/* Copyright 2021 Andrei Purdea + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +/* Address for jumping to bootloader on STM32 chips. */ +/* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606. + */ +#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000 +#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP +#    define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE +#endif diff --git a/platforms/chibios/GENERIC_STM32_F446XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h index d2de75590e..d2de75590e 100644 --- a/platforms/chibios/GENERIC_STM32_F446XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h diff --git a/platforms/chibios/GENERIC_STM32_G431XB/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_G431XB/board/board.mk index 0acbcd83c7..0acbcd83c7 100644 --- a/platforms/chibios/GENERIC_STM32_G431XB/board/board.mk +++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/board/board.mk diff --git a/platforms/chibios/GENERIC_STM32_G431XB/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/config.h index 39ce627e77..39ce627e77 100644 --- a/platforms/chibios/GENERIC_STM32_G431XB/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/config.h diff --git a/platforms/chibios/GENERIC_STM32_G431XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h index 182d4885d7..182d4885d7 100644 --- a/platforms/chibios/GENERIC_STM32_G431XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h diff --git a/platforms/chibios/GENERIC_STM32_G474XE/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_G474XE/board/board.mk index 957adf509b..957adf509b 100644 --- a/platforms/chibios/GENERIC_STM32_G474XE/board/board.mk +++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/board/board.mk diff --git a/platforms/chibios/GENERIC_STM32_G474XE/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/config.h index eb74d68e85..eb74d68e85 100644 --- a/platforms/chibios/GENERIC_STM32_G474XE/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/config.h diff --git a/platforms/chibios/GENERIC_STM32_G474XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h index 117e920e3b..117e920e3b 100644 --- a/platforms/chibios/GENERIC_STM32_G474XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h diff --git a/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_L412XB/board/board.mk index 1250385eb8..1250385eb8 100644 --- a/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/board/board.mk diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h index 51f9724f94..2e37d95fe3 100644 --- a/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h @@ -19,6 +19,6 @@  #undef STM32L432xx -// Pretend that we're an L443xx as the ChibiOS definitions for L432/L433 mistakenly don't enable GPIOH, I2C2, or SPI2. +// Pretend that we're an L443xx as the ChibiOS definitions for L4x2/L4x3 mistakenly don't enable GPIOH, I2C2, or SPI2.  // Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443.  #define STM32L443xx diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/config.h index c27c61b19a..c27c61b19a 100644 --- a/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/config.h diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h new file mode 100644 index 0000000000..8ad5a8da21 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h @@ -0,0 +1,282 @@ +/* +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * STM32L4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0       Lowest...Highest. + * + * DMA priorities: + * 0...3        Lowest...Highest. + */ + +#ifndef MCUCONF_H +#define MCUCONF_H + +#define STM32L4xx_MCUCONF +#define STM32L412_MCUCONF +#define STM32L422_MCUCONF +#define STM32L432_MCUCONF +#define STM32L433_MCUCONF +#define STM32L442_MCUCONF +#define STM32L443_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT                       FALSE +#define STM32_VOS                           STM32_VOS_RANGE1 +#define STM32_PVD_ENABLE                    FALSE +#define STM32_PLS                           STM32_PLS_LEV0 +#define STM32_HSI16_ENABLED                 TRUE +#define STM32_HSI48_ENABLED                 TRUE +#define STM32_LSI_ENABLED                   FALSE +#define STM32_HSE_ENABLED                   FALSE +#define STM32_LSE_ENABLED                   FALSE +#define STM32_MSIPLL_ENABLED                FALSE +#define STM32_ADC_CLOCK_ENABLED             TRUE +#define STM32_USB_CLOCK_ENABLED             TRUE +#define STM32_SAI1_CLOCK_ENABLED            TRUE +#define STM32_SAI2_CLOCK_ENABLED            TRUE +#define STM32_MSIRANGE                      STM32_MSIRANGE_4M +#define STM32_MSISRANGE                     STM32_MSISRANGE_4M +#define STM32_SW                            STM32_SW_PLL +#define STM32_PLLSRC                        STM32_PLLSRC_HSI16 +#define STM32_PLLM_VALUE                    4 +#define STM32_PLLN_VALUE                    80 +#define STM32_PLLP_VALUE                    7 +#define STM32_PLLQ_VALUE                    4 +#define STM32_PLLR_VALUE                    4 +#define STM32_HPRE                          STM32_HPRE_DIV1 +#define STM32_PPRE1                         STM32_PPRE1_DIV1 +#define STM32_PPRE2                         STM32_PPRE2_DIV1 +#define STM32_STOPWUCK                      STM32_STOPWUCK_MSI +#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE                        STM32_MCOPRE_DIV1 +#define STM32_LSCOSEL                       STM32_LSCOSEL_NOCLOCK +#define STM32_PLLSAI1N_VALUE                72 +#define STM32_PLLSAI1P_VALUE                7 +#define STM32_PLLSAI1Q_VALUE                6 +#define STM32_PLLSAI1R_VALUE                6 +#define STM32_PLLSAI2N_VALUE                72 +#define STM32_PLLSAI2P_VALUE                7 +#define STM32_PLLSAI2R_VALUE                6 + +/* + * Peripherals clock sources. + */ +#define STM32_USART1SEL                     STM32_USART1SEL_SYSCLK +#define STM32_USART2SEL                     STM32_USART2SEL_SYSCLK +#define STM32_USART3SEL                     STM32_USART3SEL_SYSCLK +#define STM32_UART4SEL                      STM32_UART4SEL_SYSCLK +#define STM32_UART5SEL                      STM32_UART5SEL_SYSCLK +#define STM32_LPUART1SEL                    STM32_LPUART1SEL_SYSCLK +#define STM32_I2C1SEL                       STM32_I2C1SEL_SYSCLK +#define STM32_I2C2SEL                       STM32_I2C2SEL_SYSCLK +#define STM32_I2C3SEL                       STM32_I2C3SEL_SYSCLK +#define STM32_LPTIM1SEL                     STM32_LPTIM1SEL_PCLK1 +#define STM32_LPTIM2SEL                     STM32_LPTIM2SEL_PCLK1 +#define STM32_SAI1SEL                       STM32_SAI1SEL_OFF +#define STM32_SAI2SEL                       STM32_SAI2SEL_OFF +#define STM32_CLK48SEL                      STM32_CLK48SEL_HSI48 +#define STM32_ADCSEL                        STM32_ADCSEL_SYSCLK +#define STM32_SWPMI1SEL                     STM32_SWPMI1SEL_PCLK1 +#define STM32_RTCSEL                        STM32_RTCSEL_LSI + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY            6 +#define STM32_IRQ_EXTI1_PRIORITY            6 +#define STM32_IRQ_EXTI2_PRIORITY            6 +#define STM32_IRQ_EXTI3_PRIORITY            6 +#define STM32_IRQ_EXTI4_PRIORITY            6 +#define STM32_IRQ_EXTI5_9_PRIORITY          6 +#define STM32_IRQ_EXTI10_15_PRIORITY        6 +#define STM32_IRQ_EXTI1635_38_PRIORITY      6 +#define STM32_IRQ_EXTI18_PRIORITY           6 +#define STM32_IRQ_EXTI19_PRIORITY           6 +#define STM32_IRQ_EXTI20_PRIORITY           6 +#define STM32_IRQ_EXTI21_22_PRIORITY        15 + +#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY   7 +#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY    7 +#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY          7 +#define STM32_IRQ_TIM2_PRIORITY             7 +#define STM32_IRQ_TIM6_PRIORITY             7 +#define STM32_IRQ_TIM7_PRIORITY             7 + +#define STM32_IRQ_USART1_PRIORITY           12 +#define STM32_IRQ_USART2_PRIORITY           12 +#define STM32_IRQ_USART3_PRIORITY           12 +#define STM32_IRQ_LPUART1_PRIORITY          12 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_COMPACT_SAMPLES           FALSE +#define STM32_ADC_USE_ADC1                  FALSE +#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY         2 +#define STM32_ADC_ADC12_IRQ_PRIORITY        5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5 +#define STM32_ADC_ADC123_CLOCK_MODE         ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC123_PRESC              ADC_CCR_PRESC_DIV2 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1                  FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY         11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE                 FALSE +#define STM32_DAC_USE_DAC1_CH1              FALSE +#define STM32_DAC_USE_DAC1_CH2              FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(2, 4) +#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 4) + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1                  FALSE +#define STM32_GPT_USE_TIM2                  FALSE +#define STM32_GPT_USE_TIM6                  FALSE +#define STM32_GPT_USE_TIM7                  FALSE +#define STM32_GPT_USE_TIM15                 FALSE +#define STM32_GPT_USE_TIM16                 FALSE + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1                  FALSE +#define STM32_I2C_USE_I2C3                  FALSE +#define STM32_I2C_BUSY_TIMEOUT              50 +#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C1_IRQ_PRIORITY         5 +#define STM32_I2C_I2C3_IRQ_PRIORITY         5 +#define STM32_I2C_I2C1_DMA_PRIORITY         3 +#define STM32_I2C_I2C3_DMA_PRIORITY         3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1                  FALSE +#define STM32_ICU_USE_TIM2                  FALSE +#define STM32_ICU_USE_TIM15                 FALSE +#define STM32_ICU_USE_TIM16                 FALSE + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED              FALSE +#define STM32_PWM_USE_TIM1                  FALSE +#define STM32_PWM_USE_TIM2                  FALSE +#define STM32_PWM_USE_TIM15                 FALSE +#define STM32_PWM_USE_TIM16                 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE               32 +#define STM32_RTC_PRESS_VALUE               1024 +#define STM32_RTC_CR_INIT                   0 +#define STM32_RTC_TAMPCR_INIT               0 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1             FALSE +#define STM32_SERIAL_USE_USART2             FALSE +#define STM32_SERIAL_USE_LPUART1            FALSE +#define STM32_SERIAL_USART1_PRIORITY        12 +#define STM32_SERIAL_USART2_PRIORITY        12 +#define STM32_SERIAL_LPUART1_PRIORITY       12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1                  FALSE +#define STM32_SPI_USE_SPI3                  FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 1) +#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 2) +#define STM32_SPI_SPI1_DMA_PRIORITY         1 +#define STM32_SPI_SPI3_DMA_PRIORITY         1 +#define STM32_SPI_SPI1_IRQ_PRIORITY         10 +#define STM32_SPI_SPI3_IRQ_PRIORITY         10 +#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY               8 +#define STM32_ST_USE_TIMER                  2 + +/* + * TRNG driver system settings. + */ +#define STM32_TRNG_USE_RNG1                 FALSE + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1               FALSE +#define STM32_UART_USE_USART2               FALSE +#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 6) +#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 7) +#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1                  TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY      13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY      14 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG                  FALSE + +/* + * WSPI driver system settings. + */ +#define STM32_WSPI_USE_QUADSPI1             FALSE +#define STM32_WSPI_QUADSPI1_DMA_STREAM      STM32_DMA_STREAM_ID(2, 7) +#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 1 + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/boards/GENERIC_STM32_L433XC/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_L433XC/board/board.mk new file mode 100644 index 0000000000..1250385eb8 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_L433XC/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC/board.c + +# Required include directories +BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC  += $(BOARDINC) diff --git a/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/board.h new file mode 100644 index 0000000000..2e37d95fe3 --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/board.h @@ -0,0 +1,24 @@ +/* Copyright 2018-2021 Harrison Chan (@Xelus) + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ +#pragma once + +#include_next "board.h" + +#undef STM32L432xx + +// Pretend that we're an L443xx as the ChibiOS definitions for L4x2/L4x3 mistakenly don't enable GPIOH, I2C2, or SPI2. +// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443. +#define STM32L443xx diff --git a/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/config.h new file mode 100644 index 0000000000..c27c61b19a --- /dev/null +++ b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/config.h @@ -0,0 +1,26 @@ +/* Copyright 2018-2021 Harrison Chan (@Xelus) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +/* Address for jumping to bootloader on STM32 chips. */ +/* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606. + */ +#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000 + +#define PAL_STM32_OSPEED_HIGHEST PAL_STM32_OSPEED_HIGH + +#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP +#    define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE +#endif diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/mcuconf.h index 948c740f6e..948c740f6e 100644 --- a/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_L433XC/configs/mcuconf.h diff --git a/platforms/chibios/IC_TEENSY_3_1/board/board.c b/platforms/chibios/boards/IC_TEENSY_3_1/board/board.c index 36ae8051ee..424e0c975b 100644 --- a/platforms/chibios/IC_TEENSY_3_1/board/board.c +++ b/platforms/chibios/boards/IC_TEENSY_3_1/board/board.c @@ -144,3 +144,8 @@ void __early_init(void) {   * @todo    Add your board-specific code, if any.   */  void boardInit(void) {} + + +void restart_usb_driver(USBDriver *usbp) { +    // Do nothing. Restarting the USB driver on these boards breaks it. +} diff --git a/platforms/chibios/IC_TEENSY_3_1/board/board.h b/platforms/chibios/boards/IC_TEENSY_3_1/board/board.h index c8259ab0c7..c8259ab0c7 100644 --- a/platforms/chibios/IC_TEENSY_3_1/board/board.h +++ b/platforms/chibios/boards/IC_TEENSY_3_1/board/board.h diff --git a/platforms/chibios/IC_TEENSY_3_1/board/board.mk b/platforms/chibios/boards/IC_TEENSY_3_1/board/board.mk index 842e335905..842e335905 100644 --- a/platforms/chibios/IC_TEENSY_3_1/board/board.mk +++ b/platforms/chibios/boards/IC_TEENSY_3_1/board/board.mk diff --git a/platforms/chibios/boards/IC_TEENSY_4_1/board/board.mk b/platforms/chibios/boards/IC_TEENSY_4_1/board/board.mk new file mode 100644 index 0000000000..bc242ac3c5 --- /dev/null +++ b/platforms/chibios/boards/IC_TEENSY_4_1/board/board.mk @@ -0,0 +1 @@ +include $(CHIBIOS_CONTRIB)/os/hal/boards/PJRC_TEENSY_4_1/board.mk diff --git a/platforms/chibios/boards/IC_TEENSY_4_1/rules.mk b/platforms/chibios/boards/IC_TEENSY_4_1/rules.mk new file mode 100644 index 0000000000..0c62d209c5 --- /dev/null +++ b/platforms/chibios/boards/IC_TEENSY_4_1/rules.mk @@ -0,0 +1 @@ +TEENSY_LOADER_CLI_MCU = imxrt1062 diff --git a/platforms/chibios/QMK_PROTON_C/board/board.mk b/platforms/chibios/boards/QMK_PROTON_C/board/board.mk index f891e65247..f891e65247 100644 --- a/platforms/chibios/QMK_PROTON_C/board/board.mk +++ b/platforms/chibios/boards/QMK_PROTON_C/board/board.mk diff --git a/platforms/chibios/QMK_PROTON_C/configs/board.h b/platforms/chibios/boards/QMK_PROTON_C/configs/board.h index 97159964d0..97159964d0 100644 --- a/platforms/chibios/QMK_PROTON_C/configs/board.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/board.h diff --git a/platforms/chibios/QMK_PROTON_C/configs/bootloader_defs.h b/platforms/chibios/boards/QMK_PROTON_C/configs/bootloader_defs.h index 3b0e9d20a6..3b0e9d20a6 100644 --- a/platforms/chibios/QMK_PROTON_C/configs/bootloader_defs.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/bootloader_defs.h diff --git a/platforms/chibios/QMK_PROTON_C/configs/chconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h index a1cbf68086..a1cbf68086 100644 --- a/platforms/chibios/QMK_PROTON_C/configs/chconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h diff --git a/platforms/chibios/QMK_PROTON_C/configs/config.h b/platforms/chibios/boards/QMK_PROTON_C/configs/config.h index a73f0c0b47..a73f0c0b47 100644 --- a/platforms/chibios/QMK_PROTON_C/configs/config.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/config.h diff --git a/platforms/chibios/QMK_PROTON_C/configs/halconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h index 41fbac29e0..d7a639a6d0 100644 --- a/platforms/chibios/QMK_PROTON_C/configs/halconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h @@ -412,7 +412,7 @@   *          buffers.   */  #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE                 16 +#define SERIAL_BUFFERS_SIZE                 128  #endif  /*===========================================================================*/ diff --git a/platforms/chibios/QMK_PROTON_C/configs/mcuconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h index 4d7b586c08..4d7b586c08 100644 --- a/platforms/chibios/QMK_PROTON_C/configs/mcuconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h diff --git a/platforms/chibios/QMK_PROTON_C/convert_to_proton_c.mk b/platforms/chibios/boards/QMK_PROTON_C/convert_to_proton_c.mk index 0618154678..0618154678 100644 --- a/platforms/chibios/QMK_PROTON_C/convert_to_proton_c.mk +++ b/platforms/chibios/boards/QMK_PROTON_C/convert_to_proton_c.mk diff --git a/platforms/chibios/STM32_F103_STM32DUINO/board/board.c b/platforms/chibios/boards/STM32_F103_STM32DUINO/board/board.c index 8a34e81f25..8a34e81f25 100644 --- a/platforms/chibios/STM32_F103_STM32DUINO/board/board.c +++ b/platforms/chibios/boards/STM32_F103_STM32DUINO/board/board.c diff --git a/platforms/chibios/STM32_F103_STM32DUINO/board/board.h b/platforms/chibios/boards/STM32_F103_STM32DUINO/board/board.h index 09d182d6ca..09d182d6ca 100644 --- a/platforms/chibios/STM32_F103_STM32DUINO/board/board.h +++ b/platforms/chibios/boards/STM32_F103_STM32DUINO/board/board.h diff --git a/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk b/platforms/chibios/boards/STM32_F103_STM32DUINO/board/board.mk index 842e335905..842e335905 100644 --- a/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk +++ b/platforms/chibios/boards/STM32_F103_STM32DUINO/board/board.mk diff --git a/platforms/chibios/STM32_F103_STM32DUINO/configs/mcuconf.h b/platforms/chibios/boards/STM32_F103_STM32DUINO/configs/mcuconf.h index 9945e7408d..9945e7408d 100644 --- a/platforms/chibios/STM32_F103_STM32DUINO/configs/mcuconf.h +++ b/platforms/chibios/boards/STM32_F103_STM32DUINO/configs/mcuconf.h diff --git a/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/STM32F103x8_stm32duino_bootloader.ld b/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/STM32F103x8_stm32duino_bootloader.ld new file mode 100644 index 0000000000..a4bd566b59 --- /dev/null +++ b/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/STM32F103x8_stm32duino_bootloader.ld @@ -0,0 +1,22 @@ +/* +    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * STM32F103x8 memory setup for use with the STM32Duino bootloader. + */ +f103_flash_size = 64k; + +INCLUDE stm32duino_bootloader_common.ld diff --git a/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/STM32F103xB_stm32duino_bootloader.ld b/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/STM32F103xB_stm32duino_bootloader.ld new file mode 100644 index 0000000000..dc47400dc5 --- /dev/null +++ b/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/STM32F103xB_stm32duino_bootloader.ld @@ -0,0 +1,22 @@ +/* +    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * STM32F103xB memory setup for use with the STM32Duino bootloader. + */ +f103_flash_size = 128k; + +INCLUDE stm32duino_bootloader_common.ld diff --git a/platforms/chibios/common/ld/STM32F103x8_stm32duino_bootloader.ld b/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/stm32duino_bootloader_common.ld index bb852422a3..76cd3153be 100644 --- a/platforms/chibios/common/ld/STM32F103x8_stm32duino_bootloader.ld +++ b/platforms/chibios/boards/STM32_F103_STM32DUINO/ld/stm32duino_bootloader_common.ld @@ -15,11 +15,11 @@  */  /* - * ST32F103xB memory setup for use with the maplemini bootloader. + * STM32Duino bootloader common memory setup.   */  MEMORY  { -    flash0  : org = 0x08002000, len = 64k - 0x2000 +    flash0  : org = 0x08002000, len = f103_flash_size - 0x2000      flash1  : org = 0x00000000, len = 0      flash2  : org = 0x00000000, len = 0      flash3  : org = 0x00000000, len = 0 diff --git a/platforms/chibios/common/configs/chconf.h b/platforms/chibios/boards/common/configs/chconf.h index 44327a82d7..44327a82d7 100644 --- a/platforms/chibios/common/configs/chconf.h +++ b/platforms/chibios/boards/common/configs/chconf.h diff --git a/platforms/chibios/common/configs/halconf.h b/platforms/chibios/boards/common/configs/halconf.h index 264ae4e6c1..c80f67ee27 100644 --- a/platforms/chibios/common/configs/halconf.h +++ b/platforms/chibios/boards/common/configs/halconf.h @@ -412,7 +412,7 @@   *          buffers.   */  #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE                 16 +#define SERIAL_BUFFERS_SIZE                 128  #endif  /*===========================================================================*/ diff --git a/platforms/chibios/common/ld/MKL26Z64.ld b/platforms/chibios/boards/common/ld/MKL26Z64.ld index c4ca8b874c..c4ca8b874c 100644 --- a/platforms/chibios/common/ld/MKL26Z64.ld +++ b/platforms/chibios/boards/common/ld/MKL26Z64.ld diff --git a/platforms/chibios/boards/common/ld/STM32L412xB.ld b/platforms/chibios/boards/common/ld/STM32L412xB.ld new file mode 100644 index 0000000000..5718d6bc71 --- /dev/null +++ b/platforms/chibios/boards/common/ld/STM32L412xB.ld @@ -0,0 +1,85 @@ +/* +    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * STM32L412xB memory setup. + */ +MEMORY +{ +    flash0  : org = 0x08000000, len = 128k +    flash1  : org = 0x00000000, len = 0 +    flash2  : org = 0x00000000, len = 0 +    flash3  : org = 0x00000000, len = 0 +    flash4  : org = 0x00000000, len = 0 +    flash5  : org = 0x00000000, len = 0 +    flash6  : org = 0x00000000, len = 0 +    flash7  : org = 0x00000000, len = 0 +    ram0    : org = 0x20000000, len = 32k +    ram1    : org = 0x00000000, len = 0 +    ram2    : org = 0x00000000, len = 0 +    ram3    : org = 0x00000000, len = 0 +    ram4    : org = 0x00000000, len = 0 +    ram5    : org = 0x00000000, len = 0 +    ram6    : org = 0x00000000, len = 0 +    ram7    : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region +   and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing +   of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by +   the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/platforms/chibios/keyboard-config-templates/board.h b/platforms/chibios/boards/keyboard-config-templates/board.h index 5b840c389c..5b840c389c 100644 --- a/platforms/chibios/keyboard-config-templates/board.h +++ b/platforms/chibios/boards/keyboard-config-templates/board.h diff --git a/platforms/chibios/keyboard-config-templates/chconf.h b/platforms/chibios/boards/keyboard-config-templates/chconf.h index fca444747c..fca444747c 100644 --- a/platforms/chibios/keyboard-config-templates/chconf.h +++ b/platforms/chibios/boards/keyboard-config-templates/chconf.h diff --git a/platforms/chibios/keyboard-config-templates/halconf.h b/platforms/chibios/boards/keyboard-config-templates/halconf.h index 456020f16a..456020f16a 100644 --- a/platforms/chibios/keyboard-config-templates/halconf.h +++ b/platforms/chibios/boards/keyboard-config-templates/halconf.h diff --git a/platforms/chibios/keyboard-config-templates/mcuconf.h b/platforms/chibios/boards/keyboard-config-templates/mcuconf.h index c690b02f4b..c690b02f4b 100644 --- a/platforms/chibios/keyboard-config-templates/mcuconf.h +++ b/platforms/chibios/boards/keyboard-config-templates/mcuconf.h diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c new file mode 100644 index 0000000000..8c476fcac2 --- /dev/null +++ b/platforms/chibios/drivers/analog.c @@ -0,0 +1,321 @@ +/* Copyright 2019 Drew Mills + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#include "quantum.h" +#include "analog.h" +#include <ch.h> +#include <hal.h> + +#if !HAL_USE_ADC +#    error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC." +#endif + +#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 +#    error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC." +#endif + +#if STM32_ADC_DUAL_MODE +#    error "STM32 ADC Dual Mode is not supported at this time." +#endif + +#if STM32_ADCV3_OVERSAMPLING +#    error "STM32 ADCV3 Oversampling is not supported at this time." +#endif + +// Otherwise assume V3 +#if defined(STM32F0XX) || defined(STM32L0XX) +#    define USE_ADCV1 +#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) +#    define USE_ADCV2 +#endif + +// BODGE to make v2 look like v1,3 and 4 +#ifdef USE_ADCV2 +#    if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3) +#        define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3 +#        define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15 +#        define ADC_SMPR_SMP_13P5 ADC_SAMPLE_28 +#        define ADC_SMPR_SMP_28P5 ADC_SAMPLE_56 +#        define ADC_SMPR_SMP_41P5 ADC_SAMPLE_84 +#        define ADC_SMPR_SMP_55P5 ADC_SAMPLE_112 +#        define ADC_SMPR_SMP_71P5 ADC_SAMPLE_144 +#        define ADC_SMPR_SMP_239P5 ADC_SAMPLE_480 +#    endif + +#    if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_1P5) +#        define ADC_SMPR_SMP_1P5 ADC_SAMPLE_1P5 +#        define ADC_SMPR_SMP_7P5 ADC_SAMPLE_7P5 +#        define ADC_SMPR_SMP_13P5 ADC_SAMPLE_13P5 +#        define ADC_SMPR_SMP_28P5 ADC_SAMPLE_28P5 +#        define ADC_SMPR_SMP_41P5 ADC_SAMPLE_41P5 +#        define ADC_SMPR_SMP_55P5 ADC_SAMPLE_55P5 +#        define ADC_SMPR_SMP_71P5 ADC_SAMPLE_71P5 +#        define ADC_SMPR_SMP_239P5 ADC_SAMPLE_239P5 +#    endif + +// we still sample at 12bit, but scale down to the requested bit range +#    define ADC_CFGR1_RES_12BIT 12 +#    define ADC_CFGR1_RES_10BIT 10 +#    define ADC_CFGR1_RES_8BIT 8 +#    define ADC_CFGR1_RES_6BIT 6 +#endif + +/* User configurable ADC options */ +#ifndef ADC_COUNT +#    if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) +#        define ADC_COUNT 1 +#    elif defined(STM32F3XX) +#        define ADC_COUNT 4 +#    else +#        error "ADC_COUNT has not been set for this ARM microcontroller." +#    endif +#endif + +#ifndef ADC_NUM_CHANNELS +#    define ADC_NUM_CHANNELS 1 +#elif ADC_NUM_CHANNELS != 1 +#    error "The ARM ADC implementation currently only supports reading one channel at a time." +#endif + +#ifndef ADC_BUFFER_DEPTH +#    define ADC_BUFFER_DEPTH 1 +#endif + +// For more sampling rate options, look at hal_adc_lld.h in ChibiOS +#ifndef ADC_SAMPLING_RATE +#    define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5 +#endif + +// Options are 12, 10, 8, and 6 bit. +#ifndef ADC_RESOLUTION +#    ifdef ADC_CFGR_RES_10BITS  // ADCv3, ADCv4 +#        define ADC_RESOLUTION ADC_CFGR_RES_10BITS +#    else  // ADCv1, ADCv5, or the bodge for ADCv2 above +#        define ADC_RESOLUTION ADC_CFGR1_RES_10BIT +#    endif +#endif + +static ADCConfig   adcCfg = {}; +static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH]; + +// Initialize to max number of ADCs, set to empty object to initialize all to false. +static bool adcInitialized[ADC_COUNT] = {}; + +// TODO: add back TR handling??? +static ADCConversionGroup adcConversionGroup = { +    .circular     = FALSE, +    .num_channels = (uint16_t)(ADC_NUM_CHANNELS), +#if defined(USE_ADCV1) +    .cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION, +    .smpr  = ADC_SAMPLING_RATE, +#elif defined(USE_ADCV2) +#    if !defined(STM32F1XX) +    .cr2 = ADC_CR2_SWSTART,  // F103 seem very unhappy with, F401 seems very unhappy without... +#    endif +    .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE), +    .smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE), +#else +    .cfgr = ADC_CFGR_CONT | ADC_RESOLUTION, +    .smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)}, +#endif +}; + +// clang-format off +__attribute__((weak)) adc_mux pinToMux(pin_t pin) { +    switch (pin) { +#if defined(STM32F0XX) +        case A0:  return TO_MUX( ADC_CHSELR_CHSEL0,  0 ); +        case A1:  return TO_MUX( ADC_CHSELR_CHSEL1,  0 ); +        case A2:  return TO_MUX( ADC_CHSELR_CHSEL2,  0 ); +        case A3:  return TO_MUX( ADC_CHSELR_CHSEL3,  0 ); +        case A4:  return TO_MUX( ADC_CHSELR_CHSEL4,  0 ); +        case A5:  return TO_MUX( ADC_CHSELR_CHSEL5,  0 ); +        case A6:  return TO_MUX( ADC_CHSELR_CHSEL6,  0 ); +        case A7:  return TO_MUX( ADC_CHSELR_CHSEL7,  0 ); +        case B0:  return TO_MUX( ADC_CHSELR_CHSEL8,  0 ); +        case B1:  return TO_MUX( ADC_CHSELR_CHSEL9,  0 ); +        case C0:  return TO_MUX( ADC_CHSELR_CHSEL10, 0 ); +        case C1:  return TO_MUX( ADC_CHSELR_CHSEL11, 0 ); +        case C2:  return TO_MUX( ADC_CHSELR_CHSEL12, 0 ); +        case C3:  return TO_MUX( ADC_CHSELR_CHSEL13, 0 ); +        case C4:  return TO_MUX( ADC_CHSELR_CHSEL14, 0 ); +        case C5:  return TO_MUX( ADC_CHSELR_CHSEL15, 0 ); +#elif defined(STM32F3XX) +        case A0:  return TO_MUX( ADC_CHANNEL_IN1,  0 ); +        case A1:  return TO_MUX( ADC_CHANNEL_IN2,  0 ); +        case A2:  return TO_MUX( ADC_CHANNEL_IN3,  0 ); +        case A3:  return TO_MUX( ADC_CHANNEL_IN4,  0 ); +        case A4:  return TO_MUX( ADC_CHANNEL_IN1,  1 ); +        case A5:  return TO_MUX( ADC_CHANNEL_IN2,  1 ); +        case A6:  return TO_MUX( ADC_CHANNEL_IN3,  1 ); +        case A7:  return TO_MUX( ADC_CHANNEL_IN4,  1 ); +        case B0:  return TO_MUX( ADC_CHANNEL_IN12, 2 ); +        case B1:  return TO_MUX( ADC_CHANNEL_IN1,  2 ); +        case B2:  return TO_MUX( ADC_CHANNEL_IN12, 1 ); +        case B12: return TO_MUX( ADC_CHANNEL_IN3,  3 ); +        case B13: return TO_MUX( ADC_CHANNEL_IN5,  2 ); +        case B14: return TO_MUX( ADC_CHANNEL_IN4,  3 ); +        case B15: return TO_MUX( ADC_CHANNEL_IN5,  3 ); +        case C0:  return TO_MUX( ADC_CHANNEL_IN6,  0 ); // Can also be ADC2 +        case C1:  return TO_MUX( ADC_CHANNEL_IN7,  0 ); // Can also be ADC2 +        case C2:  return TO_MUX( ADC_CHANNEL_IN8,  0 ); // Can also be ADC2 +        case C3:  return TO_MUX( ADC_CHANNEL_IN9,  0 ); // Can also be ADC2 +        case C4:  return TO_MUX( ADC_CHANNEL_IN5,  1 ); +        case C5:  return TO_MUX( ADC_CHANNEL_IN11, 1 ); +        case D8:  return TO_MUX( ADC_CHANNEL_IN12, 3 ); +        case D9:  return TO_MUX( ADC_CHANNEL_IN13, 3 ); +        case D10: return TO_MUX( ADC_CHANNEL_IN7,  2 ); // Can also be ADC4 +        case D11: return TO_MUX( ADC_CHANNEL_IN8,  2 ); // Can also be ADC4 +        case D12: return TO_MUX( ADC_CHANNEL_IN9,  2 ); // Can also be ADC4 +        case D13: return TO_MUX( ADC_CHANNEL_IN10, 2 ); // Can also be ADC4 +        case D14: return TO_MUX( ADC_CHANNEL_IN11, 2 ); // Can also be ADC4 +        case E7:  return TO_MUX( ADC_CHANNEL_IN13, 2 ); +        case E8:  return TO_MUX( ADC_CHANNEL_IN6,  2 ); // Can also be ADC4 +        case E9:  return TO_MUX( ADC_CHANNEL_IN2,  2 ); +        case E10: return TO_MUX( ADC_CHANNEL_IN14, 2 ); +        case E11: return TO_MUX( ADC_CHANNEL_IN15, 2 ); +        case E12: return TO_MUX( ADC_CHANNEL_IN16, 2 ); +        case E13: return TO_MUX( ADC_CHANNEL_IN3,  2 ); +        case E14: return TO_MUX( ADC_CHANNEL_IN1,  3 ); +        case E15: return TO_MUX( ADC_CHANNEL_IN2,  3 ); +        case F2:  return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2 +        case F4:  return TO_MUX( ADC_CHANNEL_IN5,  0 ); +#elif defined(STM32F4XX) +        case A0:  return TO_MUX( ADC_CHANNEL_IN0,  0 ); +        case A1:  return TO_MUX( ADC_CHANNEL_IN1,  0 ); +        case A2:  return TO_MUX( ADC_CHANNEL_IN2,  0 ); +        case A3:  return TO_MUX( ADC_CHANNEL_IN3,  0 ); +        case A4:  return TO_MUX( ADC_CHANNEL_IN4,  0 ); +        case A5:  return TO_MUX( ADC_CHANNEL_IN5,  0 ); +        case A6:  return TO_MUX( ADC_CHANNEL_IN6,  0 ); +        case A7:  return TO_MUX( ADC_CHANNEL_IN7,  0 ); +        case B0:  return TO_MUX( ADC_CHANNEL_IN8,  0 ); +        case B1:  return TO_MUX( ADC_CHANNEL_IN9,  0 ); +        case C0:  return TO_MUX( ADC_CHANNEL_IN10, 0 ); +        case C1:  return TO_MUX( ADC_CHANNEL_IN11, 0 ); +        case C2:  return TO_MUX( ADC_CHANNEL_IN12, 0 ); +        case C3:  return TO_MUX( ADC_CHANNEL_IN13, 0 ); +        case C4:  return TO_MUX( ADC_CHANNEL_IN14, 0 ); +        case C5:  return TO_MUX( ADC_CHANNEL_IN15, 0 ); +#    if STM32_ADC_USE_ADC3 +        case F3:  return TO_MUX( ADC_CHANNEL_IN9,  2 ); +        case F4:  return TO_MUX( ADC_CHANNEL_IN14, 2 ); +        case F5:  return TO_MUX( ADC_CHANNEL_IN15, 2 ); +        case F6:  return TO_MUX( ADC_CHANNEL_IN4,  2 ); +        case F7:  return TO_MUX( ADC_CHANNEL_IN5,  2 ); +        case F8:  return TO_MUX( ADC_CHANNEL_IN6,  2 ); +        case F9:  return TO_MUX( ADC_CHANNEL_IN7,  2 ); +        case F10: return TO_MUX( ADC_CHANNEL_IN8,  2 ); +#    endif +#elif defined(STM32F1XX) +        case A0:  return TO_MUX( ADC_CHANNEL_IN0,  0 ); +        case A1:  return TO_MUX( ADC_CHANNEL_IN1,  0 ); +        case A2:  return TO_MUX( ADC_CHANNEL_IN2,  0 ); +        case A3:  return TO_MUX( ADC_CHANNEL_IN3,  0 ); +        case A4:  return TO_MUX( ADC_CHANNEL_IN4,  0 ); +        case A5:  return TO_MUX( ADC_CHANNEL_IN5,  0 ); +        case A6:  return TO_MUX( ADC_CHANNEL_IN6,  0 ); +        case A7:  return TO_MUX( ADC_CHANNEL_IN7,  0 ); +        case B0:  return TO_MUX( ADC_CHANNEL_IN8,  0 ); +        case B1:  return TO_MUX( ADC_CHANNEL_IN9,  0 ); +        case C0:  return TO_MUX( ADC_CHANNEL_IN10, 0 ); +        case C1:  return TO_MUX( ADC_CHANNEL_IN11, 0 ); +        case C2:  return TO_MUX( ADC_CHANNEL_IN12, 0 ); +        case C3:  return TO_MUX( ADC_CHANNEL_IN13, 0 ); +        case C4:  return TO_MUX( ADC_CHANNEL_IN14, 0 ); +        case C5:  return TO_MUX( ADC_CHANNEL_IN15, 0 ); +        // STM32F103x[C-G] in 144-pin packages also have analog inputs on F6...F10, but they are on ADC3, and the +        // ChibiOS ADC driver for STM32F1xx currently supports only ADC1, therefore these pins are not usable. +#endif +    } + +    // return an adc that would never be used so intToADCDriver will bail out +    return TO_MUX(0, 0xFF); +} +// clang-format on + +static inline ADCDriver* intToADCDriver(uint8_t adcInt) { +    switch (adcInt) { +#if STM32_ADC_USE_ADC1 +        case 0: +            return &ADCD1; +#endif +#if STM32_ADC_USE_ADC2 +        case 1: +            return &ADCD2; +#endif +#if STM32_ADC_USE_ADC3 +        case 2: +            return &ADCD3; +#endif +#if STM32_ADC_USE_ADC4 +        case 3: +            return &ADCD4; +#endif +    } + +    return NULL; +} + +static inline void manageAdcInitializationDriver(uint8_t adc, ADCDriver* adcDriver) { +    if (!adcInitialized[adc]) { +        adcStart(adcDriver, &adcCfg); +        adcInitialized[adc] = true; +    } +} + +int16_t analogReadPin(pin_t pin) { +    palSetLineMode(pin, PAL_MODE_INPUT_ANALOG); + +    return adc_read(pinToMux(pin)); +} + +int16_t analogReadPinAdc(pin_t pin, uint8_t adc) { +    palSetLineMode(pin, PAL_MODE_INPUT_ANALOG); + +    adc_mux target = pinToMux(pin); +    target.adc     = adc; +    return adc_read(target); +} + +int16_t adc_read(adc_mux mux) { +#if defined(USE_ADCV1) +    // TODO: fix previous assumption of only 1 input... +    adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/ +#elif defined(USE_ADCV2) +    adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input); +#else +    adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input); +#endif + +    ADCDriver* targetDriver = intToADCDriver(mux.adc); +    if (!targetDriver) { +        return 0; +    } + +    manageAdcInitializationDriver(mux.adc, targetDriver); +    if (adcConvert(targetDriver, &adcConversionGroup, &sampleBuffer[0], ADC_BUFFER_DEPTH) != MSG_OK) { +        return 0; +    } + +#ifdef USE_ADCV2 +    // fake 12-bit -> N-bit scale +    return (*sampleBuffer) >> (12 - ADC_RESOLUTION); +#else +    // already handled as part of adcConvert +    return *sampleBuffer; +#endif +} diff --git a/platforms/chibios/drivers/analog.h b/platforms/chibios/drivers/analog.h new file mode 100644 index 0000000000..e61c394265 --- /dev/null +++ b/platforms/chibios/drivers/analog.h @@ -0,0 +1,41 @@ +/* Copyright 2019 Drew Mills + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include "quantum.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct { +    uint16_t input; +    uint8_t  adc; +} adc_mux; +#define TO_MUX(i, a) \ +    (adc_mux) { i, a } + +int16_t analogReadPin(pin_t pin); +int16_t analogReadPinAdc(pin_t pin, uint8_t adc); +adc_mux pinToMux(pin_t pin); + +int16_t adc_read(adc_mux mux); + +#ifdef __cplusplus +} +#endif diff --git a/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.c b/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.c new file mode 100644 index 0000000000..ed26cc7145 --- /dev/null +++ b/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.c @@ -0,0 +1,96 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#include <stdint.h> +#include <string.h> + +#include <hal.h> +#include "eeprom_driver.h" +#include "eeprom_stm32_L0_L1.h" + +#define EEPROM_BASE_ADDR 0x08080000 +#define EEPROM_ADDR(offset) (EEPROM_BASE_ADDR + (offset)) +#define EEPROM_PTR(offset) ((__IO uint8_t *)EEPROM_ADDR(offset)) +#define EEPROM_BYTE(location, offset) (*(EEPROM_PTR(((uint32_t)location) + ((uint32_t)offset)))) + +#define BUFFER_BYTE(buffer, offset) (*(((uint8_t *)buffer) + offset)) + +#define FLASH_PEKEY1 0x89ABCDEF +#define FLASH_PEKEY2 0x02030405 + +static inline void STM32_L0_L1_EEPROM_WaitNotBusy(void) { +    while (FLASH->SR & FLASH_SR_BSY) { +        __WFI(); +    } +} + +static inline void STM32_L0_L1_EEPROM_Unlock(void) { +    STM32_L0_L1_EEPROM_WaitNotBusy(); +    if (FLASH->PECR & FLASH_PECR_PELOCK) { +        FLASH->PEKEYR = FLASH_PEKEY1; +        FLASH->PEKEYR = FLASH_PEKEY2; +    } +} + +static inline void STM32_L0_L1_EEPROM_Lock(void) { +    STM32_L0_L1_EEPROM_WaitNotBusy(); +    FLASH->PECR |= FLASH_PECR_PELOCK; +} + +void eeprom_driver_init(void) {} + +void eeprom_driver_erase(void) { +    STM32_L0_L1_EEPROM_Unlock(); + +    for (size_t offset = 0; offset < STM32_ONBOARD_EEPROM_SIZE; offset += sizeof(uint32_t)) { +        FLASH->PECR |= FLASH_PECR_ERASE | FLASH_PECR_DATA; + +        *(__IO uint32_t *)EEPROM_ADDR(offset) = (uint32_t)0; + +        STM32_L0_L1_EEPROM_WaitNotBusy(); +        FLASH->PECR &= ~(FLASH_PECR_ERASE | FLASH_PECR_DATA); +    } + +    STM32_L0_L1_EEPROM_Lock(); +} + +void eeprom_read_block(void *buf, const void *addr, size_t len) { +    for (size_t offset = 0; offset < len; ++offset) { +        // Drop out if we've hit the limit of the EEPROM +        if ((((uint32_t)addr) + offset) >= STM32_ONBOARD_EEPROM_SIZE) { +            break; +        } + +        STM32_L0_L1_EEPROM_WaitNotBusy(); +        BUFFER_BYTE(buf, offset) = EEPROM_BYTE(addr, offset); +    } +} + +void eeprom_write_block(const void *buf, void *addr, size_t len) { +    STM32_L0_L1_EEPROM_Unlock(); + +    for (size_t offset = 0; offset < len; ++offset) { +        // Drop out if we've hit the limit of the EEPROM +        if ((((uint32_t)addr) + offset) >= STM32_ONBOARD_EEPROM_SIZE) { +            break; +        } + +        STM32_L0_L1_EEPROM_WaitNotBusy(); +        EEPROM_BYTE(addr, offset) = BUFFER_BYTE(buf, offset); +    } + +    STM32_L0_L1_EEPROM_Lock(); +} diff --git a/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.h b/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.h new file mode 100644 index 0000000000..a35defca8b --- /dev/null +++ b/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.h @@ -0,0 +1,33 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +/* +    The size used by the STM32 L0/L1 EEPROM driver. +*/ +#ifndef STM32_ONBOARD_EEPROM_SIZE +#    ifdef VIA_ENABLE +#        define STM32_ONBOARD_EEPROM_SIZE 1024 +#    else +#        include "eeconfig.h" +#        define STM32_ONBOARD_EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4)  // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO and EEPROM page sizing +#    endif +#endif + +#if STM32_ONBOARD_EEPROM_SIZE > 128 +#    pragma message("Please note: resetting EEPROM using an STM32L0/L1 device takes up to 1 second for every 1kB of internal EEPROM used.") +#endif diff --git a/platforms/chibios/drivers/i2c_master.c b/platforms/chibios/drivers/i2c_master.c new file mode 100644 index 0000000000..fc4bb2ab37 --- /dev/null +++ b/platforms/chibios/drivers/i2c_master.c @@ -0,0 +1,121 @@ +/* Copyright 2018 Jack Humbert + * Copyright 2018 Yiancar + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +/* This library is only valid for STM32 processors. + * This library follows the convention of the AVR i2c_master library. + * As a result addresses are expected to be already shifted (addr << 1). + * I2CD1 is the default driver which corresponds to pins B6 and B7. This + * can be changed. + * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that + * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file. Pins B6 and B7 are used + * but using any other I2C pins should be trivial. + */ +#include "quantum.h" +#include "i2c_master.h" +#include <string.h> +#include <hal.h> + +static uint8_t i2c_address; + +static const I2CConfig i2cconfig = { +#if defined(USE_I2CV1_CONTRIB) +    I2C1_CLOCK_SPEED, +#elif defined(USE_I2CV1) +    I2C1_OPMODE, +    I2C1_CLOCK_SPEED, +    I2C1_DUTY_CYCLE, +#else +    // This configures the I2C clock to 400khz assuming a 72Mhz clock +    // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html +    STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0 +#endif +}; + +static i2c_status_t chibios_to_qmk(const msg_t* status) { +    switch (*status) { +        case I2C_NO_ERROR: +            return I2C_STATUS_SUCCESS; +        case I2C_TIMEOUT: +            return I2C_STATUS_TIMEOUT; +        // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT +        default: +            return I2C_STATUS_ERROR; +    } +} + +__attribute__((weak)) void i2c_init(void) { +    static bool is_initialised = false; +    if (!is_initialised) { +        is_initialised = true; + +        // Try releasing special pins for a short time +        palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT); +        palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT); + +        chThdSleepMilliseconds(10); +#if defined(USE_GPIOV1) +        palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, I2C1_SCL_PAL_MODE); +        palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, I2C1_SDA_PAL_MODE); +#else +        palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +        palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +#endif +    } +} + +i2c_status_t i2c_start(uint8_t address) { +    i2c_address = address; +    i2cStart(&I2C_DRIVER, &i2cconfig); +    return I2C_STATUS_SUCCESS; +} + +i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_address = address; +    i2cStart(&I2C_DRIVER, &i2cconfig); +    msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout)); +    return chibios_to_qmk(&status); +} + +i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_address = address; +    i2cStart(&I2C_DRIVER, &i2cconfig); +    msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout)); +    return chibios_to_qmk(&status); +} + +i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_address = devaddr; +    i2cStart(&I2C_DRIVER, &i2cconfig); + +    uint8_t complete_packet[length + 1]; +    for (uint8_t i = 0; i < length; i++) { +        complete_packet[i + 1] = data[i]; +    } +    complete_packet[0] = regaddr; + +    msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout)); +    return chibios_to_qmk(&status); +} + +i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) { +    i2c_address = devaddr; +    i2cStart(&I2C_DRIVER, &i2cconfig); +    msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, TIME_MS2I(timeout)); +    return chibios_to_qmk(&status); +} + +void i2c_stop(void) { i2cStop(&I2C_DRIVER); } diff --git a/platforms/chibios/drivers/i2c_master.h b/platforms/chibios/drivers/i2c_master.h new file mode 100644 index 0000000000..c68109acbd --- /dev/null +++ b/platforms/chibios/drivers/i2c_master.h @@ -0,0 +1,113 @@ +/* Copyright 2018 Jack Humbert + * Copyright 2018 Yiancar + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +/* This library follows the convention of the AVR i2c_master library. + * As a result addresses are expected to be already shifted (addr << 1). + * I2CD1 is the default driver which corresponds to pins B6 and B7. This + * can be changed. + * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that + * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file. + */ +#pragma once + +#include <ch.h> +#include <hal.h> + +#ifdef I2C1_BANK +#    define I2C1_SCL_BANK I2C1_BANK +#    define I2C1_SDA_BANK I2C1_BANK +#endif + +#ifndef I2C1_SCL_BANK +#    define I2C1_SCL_BANK GPIOB +#endif + +#ifndef I2C1_SDA_BANK +#    define I2C1_SDA_BANK GPIOB +#endif + +#ifndef I2C1_SCL +#    define I2C1_SCL 6 +#endif +#ifndef I2C1_SDA +#    define I2C1_SDA 7 +#endif + +#ifdef USE_I2CV1 +#    ifndef I2C1_OPMODE +#        define I2C1_OPMODE OPMODE_I2C +#    endif +#    ifndef I2C1_CLOCK_SPEED +#        define I2C1_CLOCK_SPEED 100000 /* 400000 */ +#    endif +#    ifndef I2C1_DUTY_CYCLE +#        define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */ +#    endif +#else +// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock +// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html +#    ifndef I2C1_TIMINGR_PRESC +#        define I2C1_TIMINGR_PRESC 0U +#    endif +#    ifndef I2C1_TIMINGR_SCLDEL +#        define I2C1_TIMINGR_SCLDEL 7U +#    endif +#    ifndef I2C1_TIMINGR_SDADEL +#        define I2C1_TIMINGR_SDADEL 0U +#    endif +#    ifndef I2C1_TIMINGR_SCLH +#        define I2C1_TIMINGR_SCLH 38U +#    endif +#    ifndef I2C1_TIMINGR_SCLL +#        define I2C1_TIMINGR_SCLL 129U +#    endif +#endif + +#ifndef I2C_DRIVER +#    define I2C_DRIVER I2CD1 +#endif + +#ifdef USE_GPIOV1 +#    ifndef I2C1_SCL_PAL_MODE +#        define I2C1_SCL_PAL_MODE PAL_MODE_STM32_ALTERNATE_OPENDRAIN +#    endif +#    ifndef I2C1_SDA_PAL_MODE +#        define I2C1_SDA_PAL_MODE PAL_MODE_STM32_ALTERNATE_OPENDRAIN +#    endif +#else +// The default PAL alternate modes are used to signal that the pins are used for I2C +#    ifndef I2C1_SCL_PAL_MODE +#        define I2C1_SCL_PAL_MODE 4 +#    endif +#    ifndef I2C1_SDA_PAL_MODE +#        define I2C1_SDA_PAL_MODE 4 +#    endif +#endif + +typedef int16_t i2c_status_t; + +#define I2C_STATUS_SUCCESS (0) +#define I2C_STATUS_ERROR (-1) +#define I2C_STATUS_TIMEOUT (-2) + +void         i2c_init(void); +i2c_status_t i2c_start(uint8_t address); +i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout); +void         i2c_stop(void); diff --git a/platforms/chibios/drivers/serial.c b/platforms/chibios/drivers/serial.c new file mode 100644 index 0000000000..f54fbcee4e --- /dev/null +++ b/platforms/chibios/drivers/serial.c @@ -0,0 +1,278 @@ +/* + * WARNING: be careful changing this code, it is very timing dependent + */ + +#include "quantum.h" +#include "serial.h" +#include "wait.h" + +#include <hal.h> + +// TODO: resolve/remove build warnings +#if defined(RGBLIGHT_ENABLE) && defined(RGBLED_SPLIT) && defined(PROTOCOL_CHIBIOS) && defined(WS2812_DRIVER_BITBANG) +#    warning "RGBLED_SPLIT not supported with bitbang WS2812 driver" +#endif + +// default wait implementation cannot be called within interrupt +//   this method seems to be more accurate than GPT timers +#if PORT_SUPPORTS_RT == FALSE +#    error "chSysPolledDelayX method not supported on this platform" +#else +#    undef wait_us +#    define wait_us(x) chSysPolledDelayX(US2RTC(STM32_SYSCLK, x)) +#endif + +#ifndef SELECT_SOFT_SERIAL_SPEED +#    define SELECT_SOFT_SERIAL_SPEED 1 +// TODO: correct speeds... +//  0: about 189kbps (Experimental only) +//  1: about 137kbps (default) +//  2: about 75kbps +//  3: about 39kbps +//  4: about 26kbps +//  5: about 20kbps +#endif + +// Serial pulse period in microseconds. At the moment, going lower than 12 causes communication failure +#if SELECT_SOFT_SERIAL_SPEED == 0 +#    define SERIAL_DELAY 12 +#elif SELECT_SOFT_SERIAL_SPEED == 1 +#    define SERIAL_DELAY 16 +#elif SELECT_SOFT_SERIAL_SPEED == 2 +#    define SERIAL_DELAY 24 +#elif SELECT_SOFT_SERIAL_SPEED == 3 +#    define SERIAL_DELAY 32 +#elif SELECT_SOFT_SERIAL_SPEED == 4 +#    define SERIAL_DELAY 48 +#elif SELECT_SOFT_SERIAL_SPEED == 5 +#    define SERIAL_DELAY 64 +#else +#    error invalid SELECT_SOFT_SERIAL_SPEED value +#endif + +inline static void serial_delay(void) { wait_us(SERIAL_DELAY); } +inline static void serial_delay_half(void) { wait_us(SERIAL_DELAY / 2); } +inline static void serial_delay_blip(void) { wait_us(1); } +inline static void serial_output(void) { setPinOutput(SOFT_SERIAL_PIN); } +inline static void serial_input(void) { setPinInputHigh(SOFT_SERIAL_PIN); } +inline static bool serial_read_pin(void) { return !!readPin(SOFT_SERIAL_PIN); } +inline static void serial_low(void) { writePinLow(SOFT_SERIAL_PIN); } +inline static void serial_high(void) { writePinHigh(SOFT_SERIAL_PIN); } + +void interrupt_handler(void *arg); + +// Use thread + palWaitLineTimeout instead of palSetLineCallback +//  - Methods like setPinOutput and palEnableLineEvent/palDisableLineEvent +//    cause the interrupt to lock up, which would limit to only receiving data... +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { +    (void)arg; +    chRegSetThreadName("blinker"); +    while (true) { +        palWaitLineTimeout(SOFT_SERIAL_PIN, TIME_INFINITE); +        interrupt_handler(NULL); +    } +} + +void soft_serial_initiator_init(void) { +    serial_output(); +    serial_high(); +} + +void soft_serial_target_init(void) { +    serial_input(); + +    palEnablePadEvent(PAL_PORT(SOFT_SERIAL_PIN), PAL_PAD(SOFT_SERIAL_PIN), PAL_EVENT_MODE_FALLING_EDGE); +    chThdCreateStatic(waThread1, sizeof(waThread1), HIGHPRIO, Thread1, NULL); +} + +// Used by the master to synchronize timing with the slave. +static void __attribute__((noinline)) sync_recv(void) { +    serial_input(); +    // This shouldn't hang if the slave disconnects because the +    // serial line will float to high if the slave does disconnect. +    while (!serial_read_pin()) { +    } + +    serial_delay(); +} + +// Used by the slave to send a synchronization signal to the master. +static void __attribute__((noinline)) sync_send(void) { +    serial_output(); + +    serial_low(); +    serial_delay(); + +    serial_high(); +} + +// Reads a byte from the serial line +static uint8_t __attribute__((noinline)) serial_read_byte(void) { +    uint8_t byte = 0; +    serial_input(); +    for (uint8_t i = 0; i < 8; ++i) { +        byte = (byte << 1) | serial_read_pin(); +        serial_delay(); +    } + +    return byte; +} + +// Sends a byte with MSB ordering +static void __attribute__((noinline)) serial_write_byte(uint8_t data) { +    uint8_t b = 8; +    serial_output(); +    while (b--) { +        if (data & (1 << b)) { +            serial_high(); +        } else { +            serial_low(); +        } +        serial_delay(); +    } +} + +// interrupt handle to be used by the slave device +void interrupt_handler(void *arg) { +    chSysLockFromISR(); + +    sync_send(); + +    // read mid pulses +    serial_delay_blip(); + +    uint8_t checksum_computed = 0; +    int     sstd_index        = 0; + +    sstd_index = serial_read_byte(); +    sync_send(); + +    split_transaction_desc_t *trans = &split_transaction_table[sstd_index]; +    for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { +        split_trans_initiator2target_buffer(trans)[i] = serial_read_byte(); +        sync_send(); +        checksum_computed += split_trans_initiator2target_buffer(trans)[i]; +    } +    checksum_computed ^= 7; +    uint8_t checksum_received = serial_read_byte(); +    sync_send(); + +    // wait for the sync to finish sending +    serial_delay(); + +    // Allow any slave processing to occur +    if (trans->slave_callback) { +        trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans)); +    } + +    uint8_t checksum = 0; +    for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { +        serial_write_byte(split_trans_target2initiator_buffer(trans)[i]); +        sync_send(); +        serial_delay_half(); +        checksum += split_trans_target2initiator_buffer(trans)[i]; +    } +    serial_write_byte(checksum ^ 7); +    sync_send(); + +    // wait for the sync to finish sending +    serial_delay(); + +    *trans->status = (checksum_computed == checksum_received) ? TRANSACTION_ACCEPTED : TRANSACTION_DATA_ERROR; + +    // end transaction +    serial_input(); + +    // TODO: remove extra delay between transactions +    serial_delay(); + +    chSysUnlockFromISR(); +} + +///////// +//  start transaction by initiator +// +// int  soft_serial_transaction(int sstd_index) +// +// Returns: +//    TRANSACTION_END +//    TRANSACTION_NO_RESPONSE +//    TRANSACTION_DATA_ERROR +// this code is very time dependent, so we need to disable interrupts +int soft_serial_transaction(int sstd_index) { +    if (sstd_index > NUM_TOTAL_TRANSACTIONS) return TRANSACTION_TYPE_ERROR; +    split_transaction_desc_t *trans = &split_transaction_table[sstd_index]; +    if (!trans->status) return TRANSACTION_TYPE_ERROR;  // not registered + +    // TODO: remove extra delay between transactions +    serial_delay(); + +    // this code is very time dependent, so we need to disable interrupts +    chSysLock(); + +    // signal to the slave that we want to start a transaction +    serial_output(); +    serial_low(); +    serial_delay_blip(); + +    // wait for the slaves response +    serial_input(); +    serial_high(); +    serial_delay(); + +    // check if the slave is present +    if (serial_read_pin()) { +        // slave failed to pull the line low, assume not present +        dprintf("serial::NO_RESPONSE\n"); +        chSysUnlock(); +        return TRANSACTION_NO_RESPONSE; +    } + +    // if the slave is present syncronize with it + +    uint8_t checksum = 0; +    // send data to the slave +    serial_write_byte(sstd_index);  // first chunk is transaction id +    sync_recv(); + +    for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { +        serial_write_byte(split_trans_initiator2target_buffer(trans)[i]); +        sync_recv(); +        checksum += split_trans_initiator2target_buffer(trans)[i]; +    } +    serial_write_byte(checksum ^ 7); +    sync_recv(); + +    serial_delay(); +    serial_delay();  // read mid pulses + +    // receive data from the slave +    uint8_t checksum_computed = 0; +    for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { +        split_trans_target2initiator_buffer(trans)[i] = serial_read_byte(); +        sync_recv(); +        checksum_computed += split_trans_target2initiator_buffer(trans)[i]; +    } +    checksum_computed ^= 7; +    uint8_t checksum_received = serial_read_byte(); + +    sync_recv(); +    serial_delay(); + +    if ((checksum_computed) != (checksum_received)) { +        dprintf("serial::FAIL[%u,%u,%u]\n", checksum_computed, checksum_received, sstd_index); +        serial_output(); +        serial_high(); + +        chSysUnlock(); +        return TRANSACTION_DATA_ERROR; +    } + +    // always, release the line when not in use +    serial_high(); +    serial_output(); + +    chSysUnlock(); +    return TRANSACTION_END; +} diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c new file mode 100644 index 0000000000..ea4473791c --- /dev/null +++ b/platforms/chibios/drivers/serial_usart.c @@ -0,0 +1,318 @@ +/* Copyright 2021 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#include "serial_usart.h" + +#if defined(SERIAL_USART_CONFIG) +static SerialConfig serial_config = SERIAL_USART_CONFIG; +#else +static SerialConfig serial_config = { +    .speed = (SERIAL_USART_SPEED), /* speed - mandatory */ +    .cr1   = (SERIAL_USART_CR1), +    .cr2   = (SERIAL_USART_CR2), +#    if !defined(SERIAL_USART_FULL_DUPLEX) +    .cr3   = ((SERIAL_USART_CR3) | USART_CR3_HDSEL) /* activate half-duplex mode */ +#    else +    .cr3 = (SERIAL_USART_CR3) +#    endif +}; +#endif + +static SerialDriver* serial_driver = &SERIAL_USART_DRIVER; + +static inline bool react_to_transactions(void); +static inline bool __attribute__((nonnull)) receive(uint8_t* destination, const size_t size); +static inline bool __attribute__((nonnull)) send(const uint8_t* source, const size_t size); +static inline int  initiate_transaction(uint8_t sstd_index); +static inline void usart_clear(void); + +/** + * @brief Clear the receive input queue. + */ +static inline void usart_clear(void) { +    osalSysLock(); +    bool volatile queue_not_empty = !iqIsEmptyI(&serial_driver->iqueue); +    osalSysUnlock(); + +    while (queue_not_empty) { +        osalSysLock(); +        /* Hard reset the input queue. */ +        iqResetI(&serial_driver->iqueue); +        osalSysUnlock(); +        /* Allow pending interrupts to preempt. +         * Do not merge the lock/unlock blocks into one +         * or the code will not work properly. +         * The empty read adds a tiny amount of delay. */ +        (void)queue_not_empty; +        osalSysLock(); +        queue_not_empty = !iqIsEmptyI(&serial_driver->iqueue); +        osalSysUnlock(); +    } +} + +/** + * @brief Blocking send of buffer with timeout. + * + * @return true Send success. + * @return false Send failed. + */ +static inline bool send(const uint8_t* source, const size_t size) { +    bool success = (size_t)sdWriteTimeout(serial_driver, source, size, TIME_MS2I(SERIAL_USART_TIMEOUT)) == size; + +#if !defined(SERIAL_USART_FULL_DUPLEX) +    if (success) { +        /* Half duplex fills the input queue with the data we wrote - just throw it away. +           Under the right circumstances (e.g. bad cables paired with high baud rates) +           less bytes can be present in the input queue, therefore a timeout is needed. */ +        uint8_t dump[size]; +        return receive(dump, size); +    } +#endif + +    return success; +} + +/** + * @brief  Blocking receive of size * bytes with timeout. + * + * @return true Receive success. + * @return false Receive failed. + */ +static inline bool receive(uint8_t* destination, const size_t size) { +    bool success = (size_t)sdReadTimeout(serial_driver, destination, size, TIME_MS2I(SERIAL_USART_TIMEOUT)) == size; +    return success; +} + +#if !defined(SERIAL_USART_FULL_DUPLEX) + +/** + * @brief Initiate pins for USART peripheral. Half-duplex configuration. + */ +__attribute__((weak)) void usart_init(void) { +#    if defined(MCU_STM32) +#        if defined(USE_GPIOV1) +    palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); +#        else +    palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +#        endif + +#        if defined(USART_REMAP) +    USART_REMAP; +#        endif +#    else +#        pragma message "usart_init: MCU Familiy not supported by default, please supply your own init code by implementing usart_init() in your keyboard files." +#    endif +} + +#else + +/** + * @brief Initiate pins for USART peripheral. Full-duplex configuration. + */ +__attribute__((weak)) void usart_init(void) { +#    if defined(MCU_STM32) +#        if defined(USE_GPIOV1) +    palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL); +    palSetLineMode(SERIAL_USART_RX_PIN, PAL_MODE_INPUT); +#        else +    palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); +    palSetLineMode(SERIAL_USART_RX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_RX_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); +#        endif + +#        if defined(USART_REMAP) +    USART_REMAP; +#        endif +#    else +#        pragma message "usart_init: MCU Familiy not supported by default, please supply your own init code by implementing usart_init() in your keyboard files." +#    endif +} + +#endif + +/** + * @brief Overridable master specific initializations. + */ +__attribute__((weak, nonnull)) void usart_master_init(SerialDriver** driver) { +    (void)driver; +    usart_init(); +} + +/** + * @brief Overridable slave specific initializations. + */ +__attribute__((weak, nonnull)) void usart_slave_init(SerialDriver** driver) { +    (void)driver; +    usart_init(); +} + +/** + * @brief This thread runs on the slave and responds to transactions initiated + * by the master. + */ +static THD_WORKING_AREA(waSlaveThread, 1024); +static THD_FUNCTION(SlaveThread, arg) { +    (void)arg; +    chRegSetThreadName("usart_tx_rx"); + +    while (true) { +        if (!react_to_transactions()) { +            /* Clear the receive queue, to start with a clean slate. +             * Parts of failed transactions or spurious bytes could still be in it. */ +            usart_clear(); +        } +    } +} + +/** + * @brief Slave specific initializations. + */ +void soft_serial_target_init(void) { +    usart_slave_init(&serial_driver); + +    sdStart(serial_driver, &serial_config); + +    /* Start transport thread. */ +    chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL); +} + +/** + * @brief React to transactions started by the master. + */ +static inline bool react_to_transactions(void) { +    /* Wait until there is a transaction for us. */ +    uint8_t sstd_index = (uint8_t)sdGet(serial_driver); + +    /* Sanity check that we are actually responding to a valid transaction. */ +    if (sstd_index >= NUM_TOTAL_TRANSACTIONS) { +        return false; +    } + +    split_transaction_desc_t* trans = &split_transaction_table[sstd_index]; + +    /* Send back the handshake which is XORed as a simple checksum, +     to signal that the slave is ready to receive possible transaction buffers  */ +    sstd_index ^= HANDSHAKE_MAGIC; +    if (!send(&sstd_index, sizeof(sstd_index))) { +        *trans->status = TRANSACTION_DATA_ERROR; +        return false; +    } + +    /* Receive transaction buffer from the master. If this transaction requires it.*/ +    if (trans->initiator2target_buffer_size) { +        if (!receive(split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size)) { +            *trans->status = TRANSACTION_DATA_ERROR; +            return false; +        } +    } + +    /* Allow any slave processing to occur. */ +    if (trans->slave_callback) { +        trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size, split_trans_target2initiator_buffer(trans)); +    } + +    /* Send transaction buffer to the master. If this transaction requires it. */ +    if (trans->target2initiator_buffer_size) { +        if (!send(split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) { +            *trans->status = TRANSACTION_DATA_ERROR; +            return false; +        } +    } + +    *trans->status = TRANSACTION_ACCEPTED; +    return true; +} + +/** + * @brief Master specific initializations. + */ +void soft_serial_initiator_init(void) { +    usart_master_init(&serial_driver); + +#if defined(MCU_STM32) && defined(SERIAL_USART_PIN_SWAP) +    serial_config.cr2 |= USART_CR2_SWAP;  // master has swapped TX/RX pins +#endif + +    sdStart(serial_driver, &serial_config); +} + +/** + * @brief Start transaction from the master half to the slave half. + * + * @param index Transaction Table index of the transaction to start. + * @return int TRANSACTION_NO_RESPONSE in case of Timeout. + *             TRANSACTION_TYPE_ERROR in case of invalid transaction index. + *             TRANSACTION_END in case of success. + */ +int soft_serial_transaction(int index) { +    /* Clear the receive queue, to start with a clean slate. +     * Parts of failed transactions or spurious bytes could still be in it. */ +    usart_clear(); +    return initiate_transaction((uint8_t)index); +} + +/** + * @brief Initiate transaction to slave half. + */ +static inline int initiate_transaction(uint8_t sstd_index) { +    /* Sanity check that we are actually starting a valid transaction. */ +    if (sstd_index >= NUM_TOTAL_TRANSACTIONS) { +        dprintln("USART: Illegal transaction Id."); +        return TRANSACTION_TYPE_ERROR; +    } + +    split_transaction_desc_t* trans = &split_transaction_table[sstd_index]; + +    /* Transaction is not registered. Abort. */ +    if (!trans->status) { +        dprintln("USART: Transaction not registered."); +        return TRANSACTION_TYPE_ERROR; +    } + +    /* Send transaction table index to the slave, which doubles as basic handshake token. */ +    if (!send(&sstd_index, sizeof(sstd_index))) { +        dprintln("USART: Send Handshake failed."); +        return TRANSACTION_TYPE_ERROR; +    } + +    uint8_t sstd_index_shake = 0xFF; + +    /* Which we always read back first so that we can error out correctly. +     *   - due to the half duplex limitations on return codes, we always have to read *something*. +     *   - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready. +     */ +    if (!receive(&sstd_index_shake, sizeof(sstd_index_shake)) || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) { +        dprintln("USART: Handshake failed."); +        return TRANSACTION_NO_RESPONSE; +    } + +    /* Send transaction buffer to the slave. If this transaction requires it. */ +    if (trans->initiator2target_buffer_size) { +        if (!send(split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size)) { +            dprintln("USART: Send failed."); +            return TRANSACTION_NO_RESPONSE; +        } +    } + +    /* Receive transaction buffer from the slave. If this transaction requires it. */ +    if (trans->target2initiator_buffer_size) { +        if (!receive(split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) { +            dprintln("USART: Receive failed."); +            return TRANSACTION_NO_RESPONSE; +        } +    } + +    return TRANSACTION_END; +} diff --git a/platforms/chibios/drivers/serial_usart.h b/platforms/chibios/drivers/serial_usart.h new file mode 100644 index 0000000000..c64e15566f --- /dev/null +++ b/platforms/chibios/drivers/serial_usart.h @@ -0,0 +1,116 @@ +/* Copyright 2021 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include "quantum.h" +#include "serial.h" +#include "printf.h" + +#include <ch.h> +#include <hal.h> + +#if !defined(SERIAL_USART_DRIVER) +#    define SERIAL_USART_DRIVER SD1 +#endif + +#if !defined(USE_GPIOV1) +/* The default PAL alternate modes are used to signal that the pins are used for USART. */ +#    if !defined(SERIAL_USART_TX_PAL_MODE) +#        define SERIAL_USART_TX_PAL_MODE 7 +#    endif +#    if !defined(SERIAL_USART_RX_PAL_MODE) +#        define SERIAL_USART_RX_PAL_MODE 7 +#    endif +#endif + +#if defined(SOFT_SERIAL_PIN) +#    define SERIAL_USART_TX_PIN SOFT_SERIAL_PIN +#endif + +#if !defined(SERIAL_USART_TX_PIN) +#    define SERIAL_USART_TX_PIN A9 +#endif + +#if !defined(SERIAL_USART_RX_PIN) +#    define SERIAL_USART_RX_PIN A10 +#endif + +#if !defined(USART_CR1_M0) +#    define USART_CR1_M0 USART_CR1_M  // some platforms (f1xx) dont have this so +#endif + +#if !defined(SERIAL_USART_CR1) +#    define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0)  // parity enable, odd parity, 9 bit length +#endif + +#if !defined(SERIAL_USART_CR2) +#    define SERIAL_USART_CR2 (USART_CR2_STOP_1)  // 2 stop bits +#endif + +#if !defined(SERIAL_USART_CR3) +#    define SERIAL_USART_CR3 0 +#endif + +#if defined(USART1_REMAP) +#    define USART_REMAP                             \ +        do {                                        \ +            (AFIO->MAPR |= AFIO_MAPR_USART1_REMAP); \ +        } while (0) +#elif defined(USART2_REMAP) +#    define USART_REMAP                             \ +        do {                                        \ +            (AFIO->MAPR |= AFIO_MAPR_USART2_REMAP); \ +        } while (0) +#elif defined(USART3_PARTIALREMAP) +#    define USART_REMAP                                          \ +        do {                                                     \ +            (AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_PARTIALREMAP); \ +        } while (0) +#elif defined(USART3_FULLREMAP) +#    define USART_REMAP                                       \ +        do {                                                  \ +            (AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_FULLREMAP); \ +        } while (0) +#endif + +#if !defined(SELECT_SOFT_SERIAL_SPEED) +#    define SELECT_SOFT_SERIAL_SPEED 1 +#endif + +#if defined(SERIAL_USART_SPEED) +// Allow advanced users to directly set SERIAL_USART_SPEED +#elif SELECT_SOFT_SERIAL_SPEED == 0 +#    define SERIAL_USART_SPEED 460800 +#elif SELECT_SOFT_SERIAL_SPEED == 1 +#    define SERIAL_USART_SPEED 230400 +#elif SELECT_SOFT_SERIAL_SPEED == 2 +#    define SERIAL_USART_SPEED 115200 +#elif SELECT_SOFT_SERIAL_SPEED == 3 +#    define SERIAL_USART_SPEED 57600 +#elif SELECT_SOFT_SERIAL_SPEED == 4 +#    define SERIAL_USART_SPEED 38400 +#elif SELECT_SOFT_SERIAL_SPEED == 5 +#    define SERIAL_USART_SPEED 19200 +#else +#    error invalid SELECT_SOFT_SERIAL_SPEED value +#endif + +#if !defined(SERIAL_USART_TIMEOUT) +#    define SERIAL_USART_TIMEOUT 100 +#endif + +#define HANDSHAKE_MAGIC 7 diff --git a/platforms/chibios/drivers/spi_master.c b/platforms/chibios/drivers/spi_master.c new file mode 100644 index 0000000000..28ddcbb2ba --- /dev/null +++ b/platforms/chibios/drivers/spi_master.c @@ -0,0 +1,202 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ + +#include "spi_master.h" + +#include "timer.h" + +static pin_t currentSlavePin = NO_PIN; + +#if defined(K20x) || defined(KL2x) +static SPIConfig spiConfig = {NULL, 0, 0, 0}; +#else +static SPIConfig spiConfig = {false, NULL, 0, 0, 0, 0}; +#endif + +__attribute__((weak)) void spi_init(void) { +    static bool is_initialised = false; +    if (!is_initialised) { +        is_initialised = true; + +        // Try releasing special pins for a short time +        setPinInput(SPI_SCK_PIN); +        setPinInput(SPI_MOSI_PIN); +        setPinInput(SPI_MISO_PIN); + +        chThdSleepMilliseconds(10); +#if defined(USE_GPIOV1) +        palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), SPI_SCK_PAL_MODE); +        palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), SPI_MOSI_PAL_MODE); +        palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), SPI_MISO_PAL_MODE); +#else +        palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); +        palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); +        palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); +#endif +    } +} + +bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { +    if (currentSlavePin != NO_PIN || slavePin == NO_PIN) { +        return false; +    } + +    uint16_t roundedDivisor = 2; +    while (roundedDivisor < divisor) { +        roundedDivisor <<= 1; +    } + +    if (roundedDivisor < 2 || roundedDivisor > 256) { +        return false; +    } + +#if defined(K20x) || defined(KL2x) +    spiConfig.tar0 = SPIx_CTARn_FMSZ(7) | SPIx_CTARn_ASC(1); + +    if (lsbFirst) { +        spiConfig.tar0 |= SPIx_CTARn_LSBFE; +    } + +    switch (mode) { +        case 0: +            break; +        case 1: +            spiConfig.tar0 |= SPIx_CTARn_CPHA; +            break; +        case 2: +            spiConfig.tar0 |= SPIx_CTARn_CPOL; +            break; +        case 3: +            spiConfig.tar0 |= SPIx_CTARn_CPHA | SPIx_CTARn_CPOL; +            break; +    } + +    switch (roundedDivisor) { +        case 2: +            spiConfig.tar0 |= SPIx_CTARn_BR(0); +            break; +        case 4: +            spiConfig.tar0 |= SPIx_CTARn_BR(1); +            break; +        case 8: +            spiConfig.tar0 |= SPIx_CTARn_BR(3); +            break; +        case 16: +            spiConfig.tar0 |= SPIx_CTARn_BR(4); +            break; +        case 32: +            spiConfig.tar0 |= SPIx_CTARn_BR(5); +            break; +        case 64: +            spiConfig.tar0 |= SPIx_CTARn_BR(6); +            break; +        case 128: +            spiConfig.tar0 |= SPIx_CTARn_BR(7); +            break; +        case 256: +            spiConfig.tar0 |= SPIx_CTARn_BR(8); +            break; +    } +#else +    spiConfig.cr1 = 0; + +    if (lsbFirst) { +        spiConfig.cr1 |= SPI_CR1_LSBFIRST; +    } + +    switch (mode) { +        case 0: +            break; +        case 1: +            spiConfig.cr1 |= SPI_CR1_CPHA; +            break; +        case 2: +            spiConfig.cr1 |= SPI_CR1_CPOL; +            break; +        case 3: +            spiConfig.cr1 |= SPI_CR1_CPHA | SPI_CR1_CPOL; +            break; +    } + +    switch (roundedDivisor) { +        case 2: +            break; +        case 4: +            spiConfig.cr1 |= SPI_CR1_BR_0; +            break; +        case 8: +            spiConfig.cr1 |= SPI_CR1_BR_1; +            break; +        case 16: +            spiConfig.cr1 |= SPI_CR1_BR_1 | SPI_CR1_BR_0; +            break; +        case 32: +            spiConfig.cr1 |= SPI_CR1_BR_2; +            break; +        case 64: +            spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_0; +            break; +        case 128: +            spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1; +            break; +        case 256: +            spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0; +            break; +    } +#endif + +    currentSlavePin  = slavePin; +    spiConfig.ssport = PAL_PORT(slavePin); +    spiConfig.sspad  = PAL_PAD(slavePin); + +    setPinOutput(slavePin); +    spiStart(&SPI_DRIVER, &spiConfig); +    spiSelect(&SPI_DRIVER); + +    return true; +} + +spi_status_t spi_write(uint8_t data) { +    uint8_t rxData; +    spiExchange(&SPI_DRIVER, 1, &data, &rxData); + +    return rxData; +} + +spi_status_t spi_read(void) { +    uint8_t data = 0; +    spiReceive(&SPI_DRIVER, 1, &data); + +    return data; +} + +spi_status_t spi_transmit(const uint8_t *data, uint16_t length) { +    spiSend(&SPI_DRIVER, length, data); +    return SPI_STATUS_SUCCESS; +} + +spi_status_t spi_receive(uint8_t *data, uint16_t length) { +    spiReceive(&SPI_DRIVER, length, data); +    return SPI_STATUS_SUCCESS; +} + +void spi_stop(void) { +    if (currentSlavePin != NO_PIN) { +        spiUnselect(&SPI_DRIVER); +        spiStop(&SPI_DRIVER); +        currentSlavePin = NO_PIN; +    } +} diff --git a/platforms/chibios/drivers/spi_master.h b/platforms/chibios/drivers/spi_master.h new file mode 100644 index 0000000000..b5a6ef1437 --- /dev/null +++ b/platforms/chibios/drivers/spi_master.h @@ -0,0 +1,93 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <ch.h> +#include <hal.h> +#include <stdbool.h> + +#include "gpio.h" +#include "chibios_config.h" + +#ifndef SPI_DRIVER +#    define SPI_DRIVER SPID2 +#endif + +#ifndef SPI_SCK_PIN +#    define SPI_SCK_PIN B13 +#endif + +#ifndef SPI_SCK_PAL_MODE +#    if defined(USE_GPIOV1) +#        define SPI_SCK_PAL_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL +#    else +#        define SPI_SCK_PAL_MODE 5 +#    endif +#endif + +#ifndef SPI_MOSI_PIN +#    define SPI_MOSI_PIN B15 +#endif + +#ifndef SPI_MOSI_PAL_MODE +#    if defined(USE_GPIOV1) +#        define SPI_MOSI_PAL_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL +#    else +#        define SPI_MOSI_PAL_MODE 5 +#    endif +#endif + +#ifndef SPI_MISO_PIN +#    define SPI_MISO_PIN B14 +#endif + +#ifndef SPI_MISO_PAL_MODE +#    if defined(USE_GPIOV1) +#        define SPI_MISO_PAL_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL +#    else +#        define SPI_MISO_PAL_MODE 5 +#    endif +#endif + +typedef int16_t spi_status_t; + +#define SPI_STATUS_SUCCESS (0) +#define SPI_STATUS_ERROR (-1) +#define SPI_STATUS_TIMEOUT (-2) + +#define SPI_TIMEOUT_IMMEDIATE (0) +#define SPI_TIMEOUT_INFINITE (0xFFFF) + +#ifdef __cplusplus +extern "C" { +#endif +void spi_init(void); + +bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor); + +spi_status_t spi_write(uint8_t data); + +spi_status_t spi_read(void); + +spi_status_t spi_transmit(const uint8_t *data, uint16_t length); + +spi_status_t spi_receive(uint8_t *data, uint16_t length); + +void spi_stop(void); +#ifdef __cplusplus +} +#endif diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c new file mode 100644 index 0000000000..030335b342 --- /dev/null +++ b/platforms/chibios/drivers/uart.c @@ -0,0 +1,50 @@ +/* Copyright 2021 + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ + +#include "uart.h" + +#include "quantum.h" + +static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; + +void uart_init(uint32_t baud) { +    static bool is_initialised = false; + +    if (!is_initialised) { +        is_initialised = true; + +        serialConfig.speed = baud; + +#if defined(USE_GPIOV1) +        palSetLineMode(SD1_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); +        palSetLineMode(SD1_RX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); +#else +        palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE(SD1_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +        palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE(SD1_RX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +#endif +        sdStart(&SERIAL_DRIVER, &serialConfig); +    } +} + +void uart_putchar(uint8_t c) { sdPut(&SERIAL_DRIVER, c); } + +uint8_t uart_getchar(void) { +    msg_t res = sdGet(&SERIAL_DRIVER); + +    return (uint8_t)res; +} + +bool uart_available(void) { return !sdGetWouldBlock(&SERIAL_DRIVER); } diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h new file mode 100644 index 0000000000..b4e20e9fd3 --- /dev/null +++ b/platforms/chibios/drivers/uart.h @@ -0,0 +1,77 @@ +/* Copyright 2021 + * + *  This program is free software: you can redistribute it and/or modify + *  it under the terms of the GNU General Public License as published by + *  the Free Software Foundation, either version 3 of the License, or + *  (at your option) any later version. + * + *  This program is distributed in the hope that it will be useful, + *  but WITHOUT ANY WARRANTY; without even the implied warranty of + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + *  GNU General Public License for more details. + * + *  You should have received a copy of the GNU General Public License + *  along with this program.  If not, see <https://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> + +#include <hal.h> + +#ifndef SERIAL_DRIVER +#    define SERIAL_DRIVER SD1 +#endif + +#ifndef SD1_TX_PIN +#    define SD1_TX_PIN A9 +#endif + +#ifndef SD1_TX_PAL_MODE +#    define SD1_TX_PAL_MODE 7 +#endif + +#ifndef SD1_RX_PIN +#    define SD1_RX_PIN A10 +#endif + +#ifndef SD1_RX_PAL_MODE +#    define SD1_RX_PAL_MODE 7 +#endif + +#ifndef SD1_CTS_PIN +#    define SD1_CTS_PIN A11 +#endif + +#ifndef SD1_CTS_PAL_MODE +#    define SD1_CTS_PAL_MODE 7 +#endif + +#ifndef SD1_RTS_PIN +#    define SD1_RTS_PIN A12 +#endif + +#ifndef SD1_RTS_PAL_MODE +#    define SD1_RTS_PAL_MODE 7 +#endif + +#ifndef SD1_CR1 +#    define SD1_CR1 0 +#endif + +#ifndef SD1_CR2 +#    define SD1_CR2 0 +#endif + +#ifndef SD1_CR3 +#    define SD1_CR3 0 +#endif + +void uart_init(uint32_t baud); + +void uart_putchar(uint8_t c); + +uint8_t uart_getchar(void); + +bool uart_available(void); diff --git a/platforms/chibios/drivers/usbpd_stm32g4.c b/platforms/chibios/drivers/usbpd_stm32g4.c new file mode 100644 index 0000000000..f16ca8aeae --- /dev/null +++ b/platforms/chibios/drivers/usbpd_stm32g4.c @@ -0,0 +1,76 @@ +/* Copyright 2021 Nick Brassel (@tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#include <quantum.h> + +#ifndef USBPD_UCPD1_CFG1 +#    define USBPD_UCPD1_CFG1 (UCPD_CFG1_PSC_UCPDCLK_0 | UCPD_CFG1_TRANSWIN_3 | UCPD_CFG1_IFRGAP_4 | UCPD_CFG1_HBITCLKDIV_4) +#endif  // USBPD_UCPD1_CFG1 + +// Initialises the USBPD subsystem +__attribute__((weak)) void usbpd_init(void) { +    // Disable dead-battery signals +    PWR->CR3 |= PWR_CR3_UCPD_DBDIS; +    // Enable the clock for the UCPD1 peripheral +    RCC->APB1ENR2 |= RCC_APB1ENR2_UCPD1EN; + +    // Copy the existing value +    uint32_t CFG1 = UCPD1->CFG1; +    // Force-disable UCPD1 before configuring +    CFG1 &= ~UCPD_CFG1_UCPDEN; +    // Configure UCPD1 +    CFG1 = USBPD_UCPD1_CFG1; +    // Apply the changes +    UCPD1->CFG1 = CFG1; +    // Enable UCPD1 +    UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; + +    // Copy the existing value +    uint32_t CR = UCPD1->CR; +    // Clear out ANASUBMODE (irrelevant as a sink device) +    CR &= ~UCPD_CR_ANASUBMODE_Msk; +    // Advertise our capabilities as a sink, with both CC lines enabled +    CR |= UCPD_CR_ANAMODE | UCPD_CR_CCENABLE_Msk; +    // Apply the changes +    UCPD1->CR = CR; +} + +// Gets the current state of the USBPD allowance +__attribute__((weak)) usbpd_allowance_t usbpd_get_allowance(void) { +    uint32_t CR = UCPD1->CR; + +    int ucpd_enabled = (UCPD1->CFG1 & UCPD_CFG1_UCPDEN_Msk) >> UCPD_CFG1_UCPDEN_Pos; +    int anamode      = (CR & UCPD_CR_ANAMODE_Msk) >> UCPD_CR_ANAMODE_Pos; +    int cc_enabled   = (CR & UCPD_CR_CCENABLE_Msk) >> UCPD_CR_CCENABLE_Pos; + +    if (ucpd_enabled && anamode && cc_enabled) { +        uint32_t SR         = UCPD1->SR; +        int      vstate_cc1 = (SR & UCPD_SR_TYPEC_VSTATE_CC1_Msk) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos; +        int      vstate_cc2 = (SR & UCPD_SR_TYPEC_VSTATE_CC2_Msk) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos; +        int      vstate_max = vstate_cc1 > vstate_cc2 ? vstate_cc1 : vstate_cc2; +        switch (vstate_max) { +            case 0: +            case 1: +                return USBPD_500MA;  // Note that this is 500mA (i.e. max USB 2.0), not 900mA, as we're not using USB 3.1 as a sink device. +            case 2: +                return USBPD_1500MA; +            case 3: +                return USBPD_3000MA; +        } +    } + +    return USBPD_500MA; +}
\ No newline at end of file diff --git a/platforms/chibios/drivers/ws2812.c b/platforms/chibios/drivers/ws2812.c new file mode 100644 index 0000000000..0d12e2fb79 --- /dev/null +++ b/platforms/chibios/drivers/ws2812.c @@ -0,0 +1,114 @@ +#include "quantum.h" +#include "ws2812.h" +#include <ch.h> +#include <hal.h> + +/* Adapted from https://github.com/bigjosh/SimpleNeoPixelDemo/ */ + +#ifndef NOP_FUDGE +#    if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) +#        define NOP_FUDGE 0.4 +#    else +#        error("NOP_FUDGE configuration required") +#        define NOP_FUDGE 1  // this just pleases the compile so the above error is easier to spot +#    endif +#endif + +// Push Pull or Open Drain Configuration +// Default Push Pull +#ifndef WS2812_EXTERNAL_PULLUP +#    define WS2812_OUTPUT_MODE PAL_MODE_OUTPUT_PUSHPULL +#else +#    define WS2812_OUTPUT_MODE PAL_MODE_OUTPUT_OPENDRAIN +#endif + +#define NUMBER_NOPS 6 +#define CYCLES_PER_SEC (STM32_SYSCLK / NUMBER_NOPS * NOP_FUDGE) +#define NS_PER_SEC (1000000000L)  // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives +#define NS_PER_CYCLE (NS_PER_SEC / CYCLES_PER_SEC) +#define NS_TO_CYCLES(n) ((n) / NS_PER_CYCLE) + +#define wait_ns(x)                                  \ +    do {                                            \ +        for (int i = 0; i < NS_TO_CYCLES(x); i++) { \ +            __asm__ volatile("nop\n\t"              \ +                             "nop\n\t"              \ +                             "nop\n\t"              \ +                             "nop\n\t"              \ +                             "nop\n\t"              \ +                             "nop\n\t");            \ +        }                                           \ +    } while (0) + +// These are the timing constraints taken mostly from the WS2812 datasheets +// These are chosen to be conservative and avoid problems rather than for maximum throughput + +#define T1H 900           // Width of a 1 bit in ns +#define T1L (1250 - T1H)  // Width of a 1 bit in ns + +#define T0H 350           // Width of a 0 bit in ns +#define T0L (1250 - T0H)  // Width of a 0 bit in ns + +// The reset gap can be 6000 ns, but depending on the LED strip it may have to be increased +// to values like 600000 ns. If it is too small, the pixels will show nothing most of the time. +#define RES (1000 * WS2812_TRST_US)  // Width of the low gap between bits to cause a frame to latch + +void sendByte(uint8_t byte) { +    // WS2812 protocol wants most significant bits first +    for (unsigned char bit = 0; bit < 8; bit++) { +        bool is_one = byte & (1 << (7 - bit)); +        // using something like wait_ns(is_one ? T1L : T0L) here throws off timings +        if (is_one) { +            // 1 +            writePinHigh(RGB_DI_PIN); +            wait_ns(T1H); +            writePinLow(RGB_DI_PIN); +            wait_ns(T1L); +        } else { +            // 0 +            writePinHigh(RGB_DI_PIN); +            wait_ns(T0H); +            writePinLow(RGB_DI_PIN); +            wait_ns(T0L); +        } +    } +} + +void ws2812_init(void) { palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE); } + +// Setleds for standard RGB +void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) { +    static bool s_init = false; +    if (!s_init) { +        ws2812_init(); +        s_init = true; +    } + +    // this code is very time dependent, so we need to disable interrupts +    chSysLock(); + +    for (uint8_t i = 0; i < leds; i++) { +        // WS2812 protocol dictates grb order +#if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) +        sendByte(ledarray[i].g); +        sendByte(ledarray[i].r); +        sendByte(ledarray[i].b); +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB) +        sendByte(ledarray[i].r); +        sendByte(ledarray[i].g); +        sendByte(ledarray[i].b); +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR) +        sendByte(ledarray[i].b); +        sendByte(ledarray[i].g); +        sendByte(ledarray[i].r); +#endif + +#ifdef RGBW +        sendByte(ledarray[i].w); +#endif +    } + +    wait_ns(RES); + +    chSysUnlock(); +} diff --git a/platforms/chibios/drivers/ws2812_pwm.c b/platforms/chibios/drivers/ws2812_pwm.c new file mode 100644 index 0000000000..e6af55b6b3 --- /dev/null +++ b/platforms/chibios/drivers/ws2812_pwm.c @@ -0,0 +1,311 @@ +#include "ws2812.h" +#include "quantum.h" +#include <hal.h> + +/* Adapted from https://github.com/joewa/WS2812-LED-Driver_ChibiOS/ */ + +#ifdef RGBW +#    error "RGBW not supported" +#endif + +#ifndef WS2812_PWM_DRIVER +#    define WS2812_PWM_DRIVER PWMD2  // TIMx +#endif +#ifndef WS2812_PWM_CHANNEL +#    define WS2812_PWM_CHANNEL 2  // Channel +#endif +#ifndef WS2812_PWM_PAL_MODE +#    define WS2812_PWM_PAL_MODE 2  // DI Pin's alternate function value +#endif +#ifndef WS2812_DMA_STREAM +#    define WS2812_DMA_STREAM STM32_DMA1_STREAM2  // DMA Stream for TIMx_UP +#endif +#ifndef WS2812_DMA_CHANNEL +#    define WS2812_DMA_CHANNEL 2  // DMA Channel for TIMx_UP +#endif +#if (STM32_DMA_SUPPORTS_DMAMUX == TRUE) && !defined(WS2812_DMAMUX_ID) +#    error "please consult your MCU's datasheet and specify in your config.h: #define WS2812_DMAMUX_ID STM32_DMAMUX1_TIM?_UP" +#endif + +#ifndef WS2812_PWM_COMPLEMENTARY_OUTPUT +#    define WS2812_PWM_OUTPUT_MODE PWM_OUTPUT_ACTIVE_HIGH +#else +#    if !STM32_PWM_USE_ADVANCED +#        error "WS2812_PWM_COMPLEMENTARY_OUTPUT requires STM32_PWM_USE_ADVANCED == TRUE" +#    endif +#    define WS2812_PWM_OUTPUT_MODE PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH +#endif + +// Push Pull or Open Drain Configuration +// Default Push Pull +#ifndef WS2812_EXTERNAL_PULLUP +#    if defined(USE_GPIOV1) +#        define WS2812_OUTPUT_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL +#    else +#        define WS2812_OUTPUT_MODE PAL_MODE_ALTERNATE(WS2812_PWM_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING +#    endif +#else +#    if defined(USE_GPIOV1) +#        define WS2812_OUTPUT_MODE PAL_MODE_STM32_ALTERNATE_OPENDRAIN +#    else +#        define WS2812_OUTPUT_MODE PAL_MODE_ALTERNATE(WS2812_PWM_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING +#    endif +#endif + +#ifndef WS2812_PWM_TARGET_PERIOD +//#    define WS2812_PWM_TARGET_PERIOD 800000 // Original code is 800k...? +#    define WS2812_PWM_TARGET_PERIOD 80000  // TODO: work out why 10x less on f303/f4x1 +#endif + +/* --- PRIVATE CONSTANTS ---------------------------------------------------- */ + +#define WS2812_PWM_FREQUENCY (STM32_SYSCLK / 2)                             /**< Clock frequency of PWM, must be valid with respect to system clock! */ +#define WS2812_PWM_PERIOD (WS2812_PWM_FREQUENCY / WS2812_PWM_TARGET_PERIOD) /**< Clock period in ticks. 1 / 800kHz = 1.25 uS (as per datasheet) */ + +/** + * @brief   Number of bit-periods to hold the data line low at the end of a frame + * + * The reset period for each frame is defined in WS2812_TRST_US. + * Calculate the number of zeroes to add at the end assuming 1.25 uS/bit: + */ +#define WS2812_RESET_BIT_N (1000 * WS2812_TRST_US / 1250) +#define WS2812_COLOR_BIT_N (RGBLED_NUM * 24)                   /**< Number of data bits */ +#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */ + +/** + * @brief   High period for a zero, in ticks + * + * Per the datasheet: + * WS2812: + * - T0H: 200 nS to 500 nS, inclusive + * - T0L: 650 nS to 950 nS, inclusive + * WS2812B: + * - T0H: 200 nS to 500 nS, inclusive + * - T0L: 750 nS to 1050 nS, inclusive + * + * The duty cycle is calculated for a high period of 350 nS. + */ +#define WS2812_DUTYCYCLE_0 (WS2812_PWM_FREQUENCY / (1000000000 / 350)) + +/** + * @brief   High period for a one, in ticks + * + * Per the datasheet: + * WS2812: + * - T1H: 550 nS to 850 nS, inclusive + * - T1L: 450 nS to 750 nS, inclusive + * WS2812B: + * - T1H: 750 nS to 1050 nS, inclusive + * - T1L: 200 nS to 500 nS, inclusive + * + * The duty cycle is calculated for a high period of 800 nS. + * This is in the middle of the specifications of the WS2812 and WS2812B. + */ +#define WS2812_DUTYCYCLE_1 (WS2812_PWM_FREQUENCY / (1000000000 / 800)) + +/* --- PRIVATE MACROS ------------------------------------------------------- */ + +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given bit + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] byte:                 The byte number [0, 2] + * @param[in] bit:                  The bit number [0, 7] + * + * @return                          The bit index + */ +#define WS2812_BIT(led, byte, bit) (24 * (led) + 8 * (byte) + (7 - (bit))) + +#if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given red bit + * + * @note    The red byte is the middle byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit number [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_RED_BIT(led, bit) WS2812_BIT((led), 1, (bit)) + +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given green bit + * + * @note    The red byte is the first byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit number [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_GREEN_BIT(led, bit) WS2812_BIT((led), 0, (bit)) + +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given blue bit + * + * @note    The red byte is the last byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit index [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_BLUE_BIT(led, bit) WS2812_BIT((led), 2, (bit)) + +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB) +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given red bit + * + * @note    The red byte is the middle byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit number [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_RED_BIT(led, bit) WS2812_BIT((led), 0, (bit)) + +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given green bit + * + * @note    The red byte is the first byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit number [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_GREEN_BIT(led, bit) WS2812_BIT((led), 1, (bit)) + +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given blue bit + * + * @note    The red byte is the last byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit index [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_BLUE_BIT(led, bit) WS2812_BIT((led), 2, (bit)) + +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR) +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given red bit + * + * @note    The red byte is the middle byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit number [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_RED_BIT(led, bit) WS2812_BIT((led), 2, (bit)) + +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given green bit + * + * @note    The red byte is the first byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit number [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_GREEN_BIT(led, bit) WS2812_BIT((led), 1, (bit)) + +/** + * @brief   Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given blue bit + * + * @note    The red byte is the last byte in the color packet + * + * @param[in] led:                  The led index [0, @ref RGBLED_NUM) + * @param[in] bit:                  The bit index [0, 7] + * + * @return                          The bit index + */ +#    define WS2812_BLUE_BIT(led, bit) WS2812_BIT((led), 0, (bit)) +#endif + +/* --- PRIVATE VARIABLES ---------------------------------------------------- */ + +static uint32_t ws2812_frame_buffer[WS2812_BIT_N + 1]; /**< Buffer for a frame */ + +/* --- PUBLIC FUNCTIONS ----------------------------------------------------- */ +/* + * Gedanke: Double-buffer type transactions: double buffer transfers using two memory pointers for +the memory (while the DMA is reading/writing from/to a buffer, the application can +write/read to/from the other buffer). + */ + +void ws2812_init(void) { +    // Initialize led frame buffer +    uint32_t i; +    for (i = 0; i < WS2812_COLOR_BIT_N; i++) ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0;      // All color bits are zero duty cycle +    for (i = 0; i < WS2812_RESET_BIT_N; i++) ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0;  // All reset bits are zero + +    palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE); + +    // PWM Configuration +    //#pragma GCC diagnostic ignored "-Woverride-init"  // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config +    static const PWMConfig ws2812_pwm_config = { +        .frequency = WS2812_PWM_FREQUENCY, +        .period    = WS2812_PWM_PERIOD,  // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben +        .callback  = NULL, +        .channels = +            { +                [0 ... 3]                = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL},     // Channels default to disabled +                [WS2812_PWM_CHANNEL - 1] = {.mode = WS2812_PWM_OUTPUT_MODE, .callback = NULL},  // Turn on the channel we care about +            }, +        .cr2  = 0, +        .dier = TIM_DIER_UDE,  // DMA on update event for next period +    }; +    //#pragma GCC diagnostic pop  // Restore command-line warning options + +    // Configure DMA +    // dmaInit(); // Joe added this +    dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA_STREAM(0), 10, NULL, NULL); +    dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1]));  // Ziel ist der An-Zeit im Cap-Comp-Register +    dmaStreamSetMemory0(WS2812_DMA_STREAM, ws2812_frame_buffer); +    dmaStreamSetTransactionSize(WS2812_DMA_STREAM, WS2812_BIT_N); +    dmaStreamSetMode(WS2812_DMA_STREAM, STM32_DMA_CR_CHSEL(WS2812_DMA_CHANNEL) | STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3)); +    // M2P: Memory 2 Periph; PL: Priority Level + +#if (STM32_DMA_SUPPORTS_DMAMUX == TRUE) +    // If the MCU has a DMAMUX we need to assign the correct resource +    dmaSetRequestSource(WS2812_DMA_STREAM, WS2812_DMAMUX_ID); +#endif + +    // Start DMA +    dmaStreamEnable(WS2812_DMA_STREAM); + +    // Configure PWM +    // NOTE: It's required that preload be enabled on the timer channel CCR register. This is currently enabled in the +    // ChibiOS driver code, so we don't have to do anything special to the timer. If we did, we'd have to start the timer, +    // disable counting, enable the channel, and then make whatever configuration changes we need. +    pwmStart(&WS2812_PWM_DRIVER, &ws2812_pwm_config); +    pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0);  // Initial period is 0; output will be low until first duty cycle is DMA'd in +} + +void ws2812_write_led(uint16_t led_number, uint8_t r, uint8_t g, uint8_t b) { +    // Write color to frame buffer +    for (uint8_t bit = 0; bit < 8; bit++) { +        ws2812_frame_buffer[WS2812_RED_BIT(led_number, bit)]   = ((r >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0; +        ws2812_frame_buffer[WS2812_GREEN_BIT(led_number, bit)] = ((g >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0; +        ws2812_frame_buffer[WS2812_BLUE_BIT(led_number, bit)]  = ((b >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0; +    } +} + +// Setleds for standard RGB +void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) { +    static bool s_init = false; +    if (!s_init) { +        ws2812_init(); +        s_init = true; +    } + +    for (uint16_t i = 0; i < leds; i++) { +        ws2812_write_led(i, ledarray[i].r, ledarray[i].g, ledarray[i].b); +    } +} diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c new file mode 100644 index 0000000000..377a929b94 --- /dev/null +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -0,0 +1,159 @@ +#include "quantum.h" +#include "ws2812.h" + +/* Adapted from https://github.com/gamazeps/ws2812b-chibios-SPIDMA/ */ + +#ifdef RGBW +#    error "RGBW not supported" +#endif + +// Define the spi your LEDs are plugged to here +#ifndef WS2812_SPI +#    define WS2812_SPI SPID1 +#endif + +#ifndef WS2812_SPI_MOSI_PAL_MODE +#    define WS2812_SPI_MOSI_PAL_MODE 5 +#endif + +#ifndef WS2812_SPI_SCK_PAL_MODE +#    define WS2812_SPI_SCK_PAL_MODE 5 +#endif + +// Push Pull or Open Drain Configuration +// Default Push Pull +#ifndef WS2812_EXTERNAL_PULLUP +#    if defined(USE_GPIOV1) +#        define WS2812_MOSI_OUTPUT_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL +#    else +#        define WS2812_MOSI_OUTPUT_MODE PAL_MODE_ALTERNATE(WS2812_SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL +#    endif +#else +#    if defined(USE_GPIOV1) +#        define WS2812_MOSI_OUTPUT_MODE PAL_MODE_STM32_ALTERNATE_OPENDRAIN +#    else +#        define WS2812_MOSI_OUTPUT_MODE PAL_MODE_ALTERNATE(WS2812_SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN +#    endif +#endif + +// Define SPI config speed +// baudrate should target 3.2MHz +// F072 fpclk = 48MHz +// 48/16 = 3Mhz +#if WS2812_SPI_DIVISOR == 2 +#    define WS2812_SPI_DIVISOR (0) +#elif WS2812_SPI_DIVISOR == 4 +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_0) +#elif WS2812_SPI_DIVISOR == 8 +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_1) +#elif WS2812_SPI_DIVISOR == 16  // same as default +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_1 | SPI_CR1_BR_0) +#elif WS2812_SPI_DIVISOR == 32 +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_2) +#elif WS2812_SPI_DIVISOR == 64 +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_0) +#elif WS2812_SPI_DIVISOR == 128 +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_1) +#elif WS2812_SPI_DIVISOR == 256 +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) +#else +#    define WS2812_SPI_DIVISOR (SPI_CR1_BR_1 | SPI_CR1_BR_0)  // default +#endif + +// Use SPI circular buffer +#ifdef WS2812_SPI_USE_CIRCULAR_BUFFER +#    define WS2812_SPI_BUFFER_MODE 1  // circular buffer +#else +#    define WS2812_SPI_BUFFER_MODE 0  // normal buffer +#endif + +#if defined(USE_GPIOV1) +#    define WS2812_SCK_OUTPUT_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL +#else +#    define WS2812_SCK_OUTPUT_MODE PAL_MODE_ALTERNATE(WS2812_SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL +#endif + +#define BYTES_FOR_LED_BYTE 4 +#define NB_COLORS 3 +#define BYTES_FOR_LED (BYTES_FOR_LED_BYTE * NB_COLORS) +#define DATA_SIZE (BYTES_FOR_LED * RGBLED_NUM) +#define RESET_SIZE (1000 * WS2812_TRST_US / (2 * 1250)) +#define PREAMBLE_SIZE 4 + +static uint8_t txbuf[PREAMBLE_SIZE + DATA_SIZE + RESET_SIZE] = {0}; + +/* + * As the trick here is to use the SPI to send a huge pattern of 0 and 1 to + * the ws2812b protocol, we use this helper function to translate bytes into + * 0s and 1s for the LED (with the appropriate timing). + */ +static uint8_t get_protocol_eq(uint8_t data, int pos) { +    uint8_t eq = 0; +    if (data & (1 << (2 * (3 - pos)))) +        eq = 0b1110; +    else +        eq = 0b1000; +    if (data & (2 << (2 * (3 - pos)))) +        eq += 0b11100000; +    else +        eq += 0b10000000; +    return eq; +} + +static void set_led_color_rgb(LED_TYPE color, int pos) { +    uint8_t* tx_start = &txbuf[PREAMBLE_SIZE]; + +#if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j); +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j); +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j); +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB) +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.r, j); +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j); +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j); +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR) +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.b, j); +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j); +    for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.r, j); +#endif +} + +void ws2812_init(void) { +    palSetLineMode(RGB_DI_PIN, WS2812_MOSI_OUTPUT_MODE); + +#ifdef WS2812_SPI_SCK_PIN +    palSetLineMode(WS2812_SPI_SCK_PIN, WS2812_SCK_OUTPUT_MODE); +#endif  // WS2812_SPI_SCK_PIN + +    // TODO: more dynamic baudrate +    static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR}; + +    spiAcquireBus(&WS2812_SPI);     /* Acquire ownership of the bus.    */ +    spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters.       */ +    spiSelect(&WS2812_SPI);         /* Slave Select assertion.          */ +#ifdef WS2812_SPI_USE_CIRCULAR_BUFFER +    spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); +#endif +} + +void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) { +    static bool s_init = false; +    if (!s_init) { +        ws2812_init(); +        s_init = true; +    } + +    for (uint8_t i = 0; i < leds; i++) { +        set_led_color_rgb(ledarray[i], i); +    } + +    // Send async - each led takes ~0.03ms, 50 leds ~1.5ms, animations flushing faster than send will cause issues. +    // Instead spiSend can be used to send synchronously (or the thread logic can be added back). +#ifndef WS2812_SPI_USE_CIRCULAR_BUFFER +#    ifdef WS2812_SPI_SYNC +    spiSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); +#    else +    spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); +#    endif +#endif +} diff --git a/platforms/chibios/flash.mk b/platforms/chibios/flash.mk new file mode 100644 index 0000000000..c0b32c2f2b --- /dev/null +++ b/platforms/chibios/flash.mk @@ -0,0 +1,87 @@ +# Hey Emacs, this is a -*- makefile -*- +############################################################################## +# Architecture or project specific options +# + +DFU_ARGS ?= +ifneq ("$(SERIAL)","") +	DFU_ARGS += -S $(SERIAL) +endif + +DFU_UTIL ?= dfu-util + +define EXEC_DFU_UTIL +	if ! $(DFU_UTIL) -l | grep -q "Found DFU"; then \ +		printf "$(MSG_BOOTLOADER_NOT_FOUND_QUICK_RETRY)" ;\ +		sleep $(BOOTLOADER_RETRY_TIME) ;\ +		while ! $(DFU_UTIL) -l | grep -q "Found DFU"; do \ +			printf "." ;\ +			sleep $(BOOTLOADER_RETRY_TIME) ;\ +		done ;\ +		printf "\n" ;\ +	fi +	$(DFU_UTIL) $(DFU_ARGS) -D $(BUILD_DIR)/$(TARGET).bin +endef + +dfu-util: $(BUILD_DIR)/$(TARGET).bin cpfirmware sizeafter +	$(call EXEC_DFU_UTIL) + +# TODO: Remove once ARM has a way to configure EECONFIG_HANDEDNESS +#       within the emulated eeprom via dfu-util or another tool +ifneq (,$(filter $(MAKECMDGOALS),dfu-util-split-left)) +    OPT_DEFS += -DINIT_EE_HANDS_LEFT +endif + +ifneq (,$(filter $(MAKECMDGOALS),dfu-util-split-right)) +    OPT_DEFS += -DINIT_EE_HANDS_RIGHT +endif + +dfu-util-split-left: dfu-util + +dfu-util-split-right: dfu-util + +ST_LINK_CLI ?= st-link_cli +ST_LINK_ARGS ?= + +st-link-cli: $(BUILD_DIR)/$(TARGET).hex sizeafter +	$(ST_LINK_CLI) $(ST_LINK_ARGS) -q -c SWD -p $(BUILD_DIR)/$(TARGET).hex -Rst + +ST_FLASH ?= st-flash +ST_FLASH_ARGS ?= + +st-flash: $(BUILD_DIR)/$(TARGET).hex sizeafter +	$(ST_FLASH) $(ST_FLASH_ARGS) --reset --format ihex write $(BUILD_DIR)/$(TARGET).hex + +# Autodetect teensy loader +ifndef TEENSY_LOADER_CLI +    ifneq (, $(shell which teensy-loader-cli 2>/dev/null)) +        TEENSY_LOADER_CLI ?= teensy-loader-cli +    else +        TEENSY_LOADER_CLI ?= teensy_loader_cli +    endif +endif + +TEENSY_LOADER_CLI_MCU ?= $(MCU_LDSCRIPT) + +define EXEC_TEENSY +	$(TEENSY_LOADER_CLI) -mmcu=$(TEENSY_LOADER_CLI_MCU) -w -v $(BUILD_DIR)/$(TARGET).hex +endef + +teensy: $(BUILD_DIR)/$(TARGET).hex cpfirmware sizeafter +	$(call EXEC_TEENSY) + + +flash: $(BUILD_DIR)/$(TARGET).bin cpfirmware sizeafter +ifneq ($(strip $(PROGRAM_CMD)),) +	$(UNSYNC_OUTPUT_CMD) && $(PROGRAM_CMD) +else ifeq ($(strip $(BOOTLOADER)),kiibohd) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU_UTIL) +else ifeq ($(strip $(MCU_FAMILY)),KINETIS) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_TEENSY) +else ifeq ($(strip $(MCU_FAMILY)),MIMXRT1062) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_TEENSY) +else ifeq ($(strip $(MCU_FAMILY)),STM32) +	$(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU_UTIL) +else +	$(PRINT_OK); $(SILENT) || printf "$(MSG_FLASH_BOOTLOADER)" +endif | 
