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author | Dean Camera <[email protected]> | 2009-12-23 13:28:44 +0000 |
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committer | Dean Camera <[email protected]> | 2009-12-23 13:28:44 +0000 |
commit | bd5e8f07b71b4fa0c058c0edfa8ff3f59ab31610 (patch) | |
tree | 2134708569c80cf166664ef6ad3aeba9a9e08d9a /Projects/AVRISP/Lib/TPITarget.c | |
parent | be71f934a4434ebeab7e9c2263ffb1170499a169 (diff) | |
download | qmk_firmware-bd5e8f07b71b4fa0c058c0edfa8ff3f59ab31610.tar.gz qmk_firmware-bd5e8f07b71b4fa0c058c0edfa8ff3f59ab31610.zip |
Stub out more of the TPI programming protocol routines in the AVRISP project.
Diffstat (limited to 'Projects/AVRISP/Lib/TPITarget.c')
-rw-r--r-- | Projects/AVRISP/Lib/TPITarget.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/Projects/AVRISP/Lib/TPITarget.c b/Projects/AVRISP/Lib/TPITarget.c index 8b47006c96..464d403057 100644 --- a/Projects/AVRISP/Lib/TPITarget.c +++ b/Projects/AVRISP/Lib/TPITarget.c @@ -312,8 +312,26 @@ void TPITarget_SendBreak(void) */
bool TPITarget_WaitWhileNVMBusBusy(void)
{
- // TODO
-
+ TCNT0 = 0;
+ TIFR0 = (1 << OCF1A);
+
+ uint8_t TimeoutMS = TPI_NVM_TIMEOUT_MS;
+
+ /* Poll the STATUS register to check to see if NVM access has been enabled */
+ while (TimeoutMS)
+ {
+ /* Send the LDCS command to read the TPI STATUS register to see the NVM bus is active */
+ TPITarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);
+ if (TPITarget_ReceiveByte() & TPI_STATUS_NVM)
+ return true;
+
+ if (TIFR0 & (1 << OCF1A))
+ {
+ TIFR0 = (1 << OCF1A);
+ TimeoutMS--;
+ }
+ }
+
return false;
}
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