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author | HorrorTroll <[email protected]> | 2024-11-21 13:28:28 +0700 |
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committer | GitHub <[email protected]> | 2024-11-21 17:28:28 +1100 |
commit | 39161b9ee793f4c62836b209ec877acda457b88d (patch) | |
tree | aa0bd408e0b65e6c9ee31f19b2b3cdfc374e5c83 /platforms/chibios/drivers/ws2812_spi.c | |
parent | 074bbbfb2129c738a3abfcdcb3e754c7ffcd1b04 (diff) | |
download | qmk_firmware-39161b9ee793f4c62836b209ec877acda457b88d.tar.gz qmk_firmware-39161b9ee793f4c62836b209ec877acda457b88d.zip |
Added MCU support for ArteryTek AT32F415 (#23445)
Diffstat (limited to 'platforms/chibios/drivers/ws2812_spi.c')
-rw-r--r-- | platforms/chibios/drivers/ws2812_spi.c | 71 |
1 files changed, 53 insertions, 18 deletions
diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index a1357edec5..d1792b871b 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -40,26 +40,53 @@ // Define SPI config speed // baudrate should target 3.2MHz +#if defined(AT32F415) +# if WS2812_SPI_DIVISOR == 2 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (0) +# elif WS2812_SPI_DIVISOR == 4 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 8 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_1) +# elif WS2812_SPI_DIVISOR == 16 // default +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 32 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2) +# elif WS2812_SPI_DIVISOR == 64 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 128 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1) +# elif WS2812_SPI_DIVISOR == 256 +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0) +# elif WS2812_SPI_DIVISOR == 512 +# define WS2812_SPI_DIVISOR_CTRL2_MDIV_X (SPI_CTRL1_MDIV_3) +# elif WS2812_SPI_DIVISOR == 1024 +# define WS2812_SPI_DIVISOR_CTRL2_MDIV_X (SPI_CTRL1_MDIV_3) +# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_0) +# else +# error "Configured WS2812_SPI_DIVISOR value is not supported at this time." +# endif +#else // F072 fpclk = 48MHz // 48/16 = 3Mhz -#if WS2812_SPI_DIVISOR == 2 -# define WS2812_SPI_DIVISOR_CR1_BR_X (0) -#elif WS2812_SPI_DIVISOR == 4 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0) -#elif WS2812_SPI_DIVISOR == 8 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1) -#elif WS2812_SPI_DIVISOR == 16 // default -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) -#elif WS2812_SPI_DIVISOR == 32 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2) -#elif WS2812_SPI_DIVISOR == 64 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0) -#elif WS2812_SPI_DIVISOR == 128 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1) -#elif WS2812_SPI_DIVISOR == 256 -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) -#else -# error "Configured WS2812_SPI_DIVISOR value is not supported at this time." +# if WS2812_SPI_DIVISOR == 2 +# define WS2812_SPI_DIVISOR_CR1_BR_X (0) +# elif WS2812_SPI_DIVISOR == 4 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0) +# elif WS2812_SPI_DIVISOR == 8 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1) +# elif WS2812_SPI_DIVISOR == 16 // default +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) +# elif WS2812_SPI_DIVISOR == 32 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2) +# elif WS2812_SPI_DIVISOR == 64 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0) +# elif WS2812_SPI_DIVISOR == 128 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1) +# elif WS2812_SPI_DIVISOR == 256 +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) +# else +# error "Configured WS2812_SPI_DIVISOR value is not supported at this time." +# endif #endif // Use SPI circular buffer @@ -176,8 +203,16 @@ void ws2812_init(void) { NULL, // error_cb PAL_PORT(WS2812_DI_PIN), PAL_PAD(WS2812_DI_PIN), +# if defined(AT32F415) + WS2812_SPI_DIVISOR_CTRL1_MDIV_X, +# if (WS2812_SPI_DIVISOR == 512 || WS2812_SPI_DIVISOR == 1024) + WS2812_SPI_DIVISOR_CTRL2_MDIV_X, +# endif + 0 +# else WS2812_SPI_DIVISOR_CR1_BR_X, 0 +# endif #endif }; |