zmk_build

ZMK code & build repository
git clone https://git.pngu.org/zmk_build
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commit 553276872cc2062e91c392b054f7d7087a5fec11
parent 418ada9b601247ce90785e6b6ab67e3dbc26e88f
Author: Jack Sangdahl <jack@pngu.org>
Date:   Sat, 31 Jan 2026 10:33:14 -0700

Modernise some configuration

Diffstat:
Mbuild.sh | 12++++++------
Mconfig/flake.keymap | 4++--
Mconfig/revxlp.keymap | 4++--
Drevxlp/boards/shields/revxlp/boards/seeeduino_xiao_ble.conf | 1-
Drevxlp/boards/shields/revxlp/boards/seeeduino_xiao_ble.overlay | 13-------------
Arevxlp/boards/shields/revxlp/boards/xiao_ble.conf | 2++
Arevxlp/boards/shields/revxlp/boards/xiao_ble.overlay | 13+++++++++++++
7 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/build.sh b/build.sh @@ -29,20 +29,20 @@ printf "(1) flake\t(2) revxlp\t(3) settings reset:\t" read opt; case $opt in 1) - build flake_dongle nice_nano_v2 "flake_dongle" - build flake_left nice_nano_v2 "flake" - build flake_right nice_nano_v2 "flake" + build flake_dongle nice_nano "flake_dongle" + build flake_left nice_nano "flake" + build flake_right nice_nano "flake" ;; 2) - build revxlp seeeduino_xiao_ble "revxlp" + build revxlp xiao_ble "revxlp" ;; 3) printf "${BOLD}select microcontroller${NORMAL}...\n" printf "(1) nice nano v2\t(2) xiao ble:\t" read val; case $val in - 1) MCU="nice_nano_v2" ;; - 2) MCU="seeeduino_xiao_ble" ;; + 1) MCU="nice_nano" ;; + 2) MCU="xiao_ble" ;; *) printf "${RED}invalid entry${NORMAL}\n" ;; esac build settings_reset $MCU diff --git a/config/flake.keymap b/config/flake.keymap @@ -19,7 +19,7 @@ 1 { bindings = < &kp N1 &kp N2 &kp N3 &kp N4 &kp N5 &kp N6 &kp N7 &kp N8 &kp N9 &kp N0 - &trans &trans &updir &recall &kp TAB &kp LEFT HRMR(DOWN UP RIGHT CAPS) + &trans &trans &updir &recall &kp TAB &kp LEFT HRMR(DOWN, UP, RIGHT, CAPS) &kp C_VOL_DN &kp C_PP &trans &trans &trans &trans &trans &trans &trans &kp C_VOL_UP &trans &trans &trans &trans &trans &trans &mo 3 &trans &trans &trans >; @@ -27,7 +27,7 @@ 2 { bindings = < &kp GRAVE &leq &geq &td_min_dash &kp PIPE &kp CARET &kp LBRC &kp RBRC &kp DLLR &kp BSLH - &kp EXCL &kp STAR &pl_asgn &kp EQUAL &kp AMPS &kp HASH HRMR(LPAR RPAR SQT DQT) + &kp EXCL &kp STAR &pl_asgn &kp EQUAL &kp AMPS &kp HASH HRMR(LPAR, RPAR, SQT, DQT) &kp TILDE &kp PLUS &kp LBKT &kp RBKT &kp PRCNT &kp AT &kp COLON &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans >; diff --git a/config/revxlp.keymap b/config/revxlp.keymap @@ -19,7 +19,7 @@ 1 { bindings = < &kp N1 &kp N2 &kp N3 &kp N4 &kp N5 &kp N6 &kp N7 &kp N8 &kp N9 &kp N0 - &trans &trans &updir &recall &kp TAB &kp LEFT HRMR(DOWN UP RIGHT CAPS) + &trans &trans &updir &recall &kp TAB &kp LEFT HRMR(DOWN, UP, RIGHT, CAPS) &kp C_VOL_DN &kp C_PP &trans &trans &trans &trans &trans &trans &trans &kp C_VOL_UP &trans &trans &trans &trans &mo 3 &trans >; @@ -27,7 +27,7 @@ 2 { bindings = < &kp GRAVE &leq &geq &td_min_dash &kp PIPE &kp CARET &kp LBRC &kp RBRC &kp DLLR &kp BSLH - &kp EXCL &kp STAR &pl_asgn &kp EQUAL &kp AMPS &kp HASH HRMR(LPAR RPAR SQT DQT) + &kp EXCL &kp STAR &pl_asgn &kp EQUAL &kp AMPS &kp HASH HRMR(LPAR, RPAR, SQT, DQT) &kp TILDE &kp PLUS &kp LBKT &kp RBKT &kp PRCNT &kp AT &kp COLON &trans &trans &trans &trans &trans &trans &trans &trans &trans >; diff --git a/revxlp/boards/shields/revxlp/boards/seeeduino_xiao_ble.conf b/revxlp/boards/shields/revxlp/boards/seeeduino_xiao_ble.conf @@ -1 +0,0 @@ -CONFIG_SPI=y diff --git a/revxlp/boards/shields/revxlp/boards/seeeduino_xiao_ble.overlay b/revxlp/boards/shields/revxlp/boards/seeeduino_xiao_ble.overlay @@ -1,13 +0,0 @@ -&spi2_default { - group1 { - psels = <NRF_PSEL(SPIM_SCK, 1, 13)>, - <NRF_PSEL(SPIM_MOSI, 1, 15)>; - }; -}; - -&spi2_sleep { - group1 { - psels = <NRF_PSEL(SPIM_SCK, 1, 13)>, - <NRF_PSEL(SPIM_MOSI, 1, 15)>; - }; -}; diff --git a/revxlp/boards/shields/revxlp/boards/xiao_ble.conf b/revxlp/boards/shields/revxlp/boards/xiao_ble.conf @@ -0,0 +1,2 @@ +CONFIG_SPI=y +CONFIG_ZMK_KSCAN_MATRIX_POLLING=y diff --git a/revxlp/boards/shields/revxlp/boards/xiao_ble.overlay b/revxlp/boards/shields/revxlp/boards/xiao_ble.overlay @@ -0,0 +1,13 @@ +&spi2_default { + group1 { + psels = <NRF_PSEL(SPIM_SCK, 1, 13)>, + <NRF_PSEL(SPIM_MOSI, 1, 15)>; + }; +}; + +&spi2_sleep { + group1 { + psels = <NRF_PSEL(SPIM_SCK, 1, 13)>, + <NRF_PSEL(SPIM_MOSI, 1, 15)>; + }; +};